344 lines
8.1 KiB
C
344 lines
8.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Driver for Analog Devices ADV748X CSI-2 Transmitter
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*
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* Copyright (C) 2017 Renesas Electronics Corp.
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*/
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-ioctl.h>
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#include "adv748x.h"
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int adv748x_csi2_set_virtual_channel(struct adv748x_csi2 *tx, unsigned int vc)
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{
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return tx_write(tx, ADV748X_CSI_VC_REF, vc << ADV748X_CSI_VC_REF_SHIFT);
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}
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/**
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* adv748x_csi2_register_link : Register and link internal entities
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*
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* @tx: CSI2 private entity
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* @v4l2_dev: Video registration device
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* @src: Source subdevice to establish link
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* @src_pad: Pad number of source to link to this @tx
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* @enable: Link enabled flag
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*
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* Ensure that the subdevice is registered against the v4l2_device, and link the
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* source pad to the sink pad of the CSI2 bus entity.
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*/
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static int adv748x_csi2_register_link(struct adv748x_csi2 *tx,
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struct v4l2_device *v4l2_dev,
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struct v4l2_subdev *src,
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unsigned int src_pad,
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bool enable)
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{
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int ret;
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if (!src->v4l2_dev) {
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ret = v4l2_device_register_subdev(v4l2_dev, src);
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if (ret)
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return ret;
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}
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ret = media_create_pad_link(&src->entity, src_pad,
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&tx->sd.entity, ADV748X_CSI2_SINK,
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enable ? MEDIA_LNK_FL_ENABLED : 0);
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if (ret)
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return ret;
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if (enable)
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tx->src = src;
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return 0;
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}
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/* -----------------------------------------------------------------------------
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* v4l2_subdev_internal_ops
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*
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* We use the internal registered operation to be able to ensure that our
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* incremental subdevices (not connected in the forward path) can be registered
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* against the resulting video path and media device.
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*/
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static int adv748x_csi2_registered(struct v4l2_subdev *sd)
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{
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struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
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struct adv748x_state *state = tx->state;
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int ret;
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adv_dbg(state, "Registered %s (%s)", is_txa(tx) ? "TXA":"TXB",
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sd->name);
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/*
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* Link TXA to AFE and HDMI, and TXB to AFE only as TXB cannot output
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* HDMI.
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*
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* The HDMI->TXA link is enabled by default, as is the AFE->TXB one.
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*/
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if (is_afe_enabled(state)) {
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ret = adv748x_csi2_register_link(tx, sd->v4l2_dev,
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&state->afe.sd,
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ADV748X_AFE_SOURCE,
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is_txb(tx));
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if (ret)
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return ret;
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/* TXB can output AFE signals only. */
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if (is_txb(tx))
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state->afe.tx = tx;
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}
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/* Register link to HDMI for TXA only. */
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if (is_txb(tx) || !is_hdmi_enabled(state))
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return 0;
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ret = adv748x_csi2_register_link(tx, sd->v4l2_dev, &state->hdmi.sd,
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ADV748X_HDMI_SOURCE, true);
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if (ret)
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return ret;
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/* The default HDMI output is TXA. */
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state->hdmi.tx = tx;
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return 0;
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}
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static const struct v4l2_subdev_internal_ops adv748x_csi2_internal_ops = {
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.registered = adv748x_csi2_registered,
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};
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/* -----------------------------------------------------------------------------
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* v4l2_subdev_video_ops
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*/
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static int adv748x_csi2_s_stream(struct v4l2_subdev *sd, int enable)
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{
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struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
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struct v4l2_subdev *src;
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src = adv748x_get_remote_sd(&tx->pads[ADV748X_CSI2_SINK]);
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if (!src)
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return -EPIPE;
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return v4l2_subdev_call(src, video, s_stream, enable);
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}
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static const struct v4l2_subdev_video_ops adv748x_csi2_video_ops = {
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.s_stream = adv748x_csi2_s_stream,
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};
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/* -----------------------------------------------------------------------------
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* v4l2_subdev_pad_ops
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*
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* The CSI2 bus pads are ignorant to the data sizes or formats.
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* But we must support setting the pad formats for format propagation.
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*/
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static struct v4l2_mbus_framefmt *
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adv748x_csi2_get_pad_format(struct v4l2_subdev *sd,
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struct v4l2_subdev_state *sd_state,
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unsigned int pad, u32 which)
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{
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struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
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if (which == V4L2_SUBDEV_FORMAT_TRY)
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return v4l2_subdev_get_try_format(sd, sd_state, pad);
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return &tx->format;
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}
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static int adv748x_csi2_get_format(struct v4l2_subdev *sd,
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struct v4l2_subdev_state *sd_state,
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struct v4l2_subdev_format *sdformat)
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{
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struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
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struct adv748x_state *state = tx->state;
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struct v4l2_mbus_framefmt *mbusformat;
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mbusformat = adv748x_csi2_get_pad_format(sd, sd_state, sdformat->pad,
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sdformat->which);
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if (!mbusformat)
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return -EINVAL;
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mutex_lock(&state->mutex);
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sdformat->format = *mbusformat;
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mutex_unlock(&state->mutex);
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return 0;
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}
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static int adv748x_csi2_set_format(struct v4l2_subdev *sd,
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struct v4l2_subdev_state *sd_state,
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struct v4l2_subdev_format *sdformat)
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{
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struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
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struct adv748x_state *state = tx->state;
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struct v4l2_mbus_framefmt *mbusformat;
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int ret = 0;
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mbusformat = adv748x_csi2_get_pad_format(sd, sd_state, sdformat->pad,
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sdformat->which);
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if (!mbusformat)
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return -EINVAL;
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mutex_lock(&state->mutex);
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if (sdformat->pad == ADV748X_CSI2_SOURCE) {
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const struct v4l2_mbus_framefmt *sink_fmt;
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sink_fmt = adv748x_csi2_get_pad_format(sd, sd_state,
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ADV748X_CSI2_SINK,
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sdformat->which);
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if (!sink_fmt) {
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ret = -EINVAL;
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goto unlock;
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}
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sdformat->format = *sink_fmt;
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}
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*mbusformat = sdformat->format;
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unlock:
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mutex_unlock(&state->mutex);
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return ret;
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}
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static int adv748x_csi2_get_mbus_config(struct v4l2_subdev *sd, unsigned int pad,
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struct v4l2_mbus_config *config)
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{
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struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
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if (pad != ADV748X_CSI2_SOURCE)
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return -EINVAL;
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config->type = V4L2_MBUS_CSI2_DPHY;
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config->bus.mipi_csi2.num_data_lanes = tx->active_lanes;
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return 0;
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}
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static const struct v4l2_subdev_pad_ops adv748x_csi2_pad_ops = {
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.get_fmt = adv748x_csi2_get_format,
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.set_fmt = adv748x_csi2_set_format,
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.get_mbus_config = adv748x_csi2_get_mbus_config,
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};
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/* -----------------------------------------------------------------------------
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* v4l2_subdev_ops
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*/
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static const struct v4l2_subdev_ops adv748x_csi2_ops = {
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.video = &adv748x_csi2_video_ops,
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.pad = &adv748x_csi2_pad_ops,
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};
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/* -----------------------------------------------------------------------------
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* Subdev module and controls
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*/
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int adv748x_csi2_set_pixelrate(struct v4l2_subdev *sd, s64 rate)
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{
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struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
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if (!tx->pixel_rate)
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return -EINVAL;
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return v4l2_ctrl_s_ctrl_int64(tx->pixel_rate, rate);
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}
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static int adv748x_csi2_s_ctrl(struct v4l2_ctrl *ctrl)
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{
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switch (ctrl->id) {
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case V4L2_CID_PIXEL_RATE:
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return 0;
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default:
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return -EINVAL;
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}
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}
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static const struct v4l2_ctrl_ops adv748x_csi2_ctrl_ops = {
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.s_ctrl = adv748x_csi2_s_ctrl,
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};
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static int adv748x_csi2_init_controls(struct adv748x_csi2 *tx)
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{
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v4l2_ctrl_handler_init(&tx->ctrl_hdl, 1);
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tx->pixel_rate = v4l2_ctrl_new_std(&tx->ctrl_hdl,
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&adv748x_csi2_ctrl_ops,
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V4L2_CID_PIXEL_RATE, 1, INT_MAX,
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1, 1);
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tx->sd.ctrl_handler = &tx->ctrl_hdl;
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if (tx->ctrl_hdl.error) {
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v4l2_ctrl_handler_free(&tx->ctrl_hdl);
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return tx->ctrl_hdl.error;
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}
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return v4l2_ctrl_handler_setup(&tx->ctrl_hdl);
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}
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int adv748x_csi2_init(struct adv748x_state *state, struct adv748x_csi2 *tx)
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{
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int ret;
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if (!is_tx_enabled(tx))
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return 0;
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adv748x_subdev_init(&tx->sd, state, &adv748x_csi2_ops,
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MEDIA_ENT_F_VID_IF_BRIDGE,
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is_txa(tx) ? "txa" : "txb");
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/* Ensure that matching is based upon the endpoint fwnodes */
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tx->sd.fwnode = of_fwnode_handle(state->endpoints[tx->port]);
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/* Register internal ops for incremental subdev registration */
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tx->sd.internal_ops = &adv748x_csi2_internal_ops;
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tx->pads[ADV748X_CSI2_SINK].flags = MEDIA_PAD_FL_SINK;
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tx->pads[ADV748X_CSI2_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
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ret = media_entity_pads_init(&tx->sd.entity, ADV748X_CSI2_NR_PADS,
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tx->pads);
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if (ret)
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return ret;
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ret = adv748x_csi2_init_controls(tx);
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if (ret)
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goto err_free_media;
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ret = v4l2_async_register_subdev(&tx->sd);
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if (ret)
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goto err_free_ctrl;
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return 0;
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err_free_ctrl:
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v4l2_ctrl_handler_free(&tx->ctrl_hdl);
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err_free_media:
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media_entity_cleanup(&tx->sd.entity);
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return ret;
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}
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void adv748x_csi2_cleanup(struct adv748x_csi2 *tx)
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{
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if (!is_tx_enabled(tx))
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return;
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v4l2_async_unregister_subdev(&tx->sd);
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media_entity_cleanup(&tx->sd.entity);
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v4l2_ctrl_handler_free(&tx->ctrl_hdl);
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}
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