141 lines
4.3 KiB
C
141 lines
4.3 KiB
C
/*
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* Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
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* Copyright (C) 2009 Wind River Systems Inc
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*/
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#ifndef _ASM_NIOS2_DMA_MAPPING_H
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#define _ASM_NIOS2_DMA_MAPPING_H
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#include <linux/scatterlist.h>
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#include <linux/cache.h>
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#include <asm/cacheflush.h>
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static inline void __dma_sync_for_device(void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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switch (direction) {
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case DMA_FROM_DEVICE:
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invalidate_dcache_range((unsigned long)vaddr,
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(unsigned long)(vaddr + size));
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break;
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case DMA_TO_DEVICE:
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/*
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* We just need to flush the caches here , but Nios2 flush
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* instruction will do both writeback and invalidate.
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*/
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case DMA_BIDIRECTIONAL: /* flush and invalidate */
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flush_dcache_range((unsigned long)vaddr,
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(unsigned long)(vaddr + size));
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break;
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default:
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BUG();
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}
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}
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static inline void __dma_sync_for_cpu(void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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switch (direction) {
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case DMA_BIDIRECTIONAL:
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case DMA_FROM_DEVICE:
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invalidate_dcache_range((unsigned long)vaddr,
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(unsigned long)(vaddr + size));
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break;
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case DMA_TO_DEVICE:
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break;
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default:
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BUG();
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}
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}
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag);
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void dma_free_coherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle);
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static inline dma_addr_t dma_map_single(struct device *dev, void *ptr,
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size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(!valid_dma_direction(direction));
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__dma_sync_for_device(ptr, size, direction);
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return virt_to_phys(ptr);
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}
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static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
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size_t size, enum dma_data_direction direction)
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{
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}
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extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction direction);
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extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size, enum dma_data_direction direction);
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extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
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size_t size, enum dma_data_direction direction);
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extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nhwentries, enum dma_data_direction direction);
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extern void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction direction);
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extern void dma_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size, enum dma_data_direction direction);
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extern void dma_sync_single_range_for_cpu(struct device *dev,
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dma_addr_t dma_handle, unsigned long offset, size_t size,
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enum dma_data_direction direction);
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extern void dma_sync_single_range_for_device(struct device *dev,
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dma_addr_t dma_handle, unsigned long offset, size_t size,
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enum dma_data_direction direction);
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extern void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
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int nelems, enum dma_data_direction direction);
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extern void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
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int nelems, enum dma_data_direction direction);
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static inline int dma_supported(struct device *dev, u64 mask)
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{
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return 1;
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}
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static inline int dma_set_mask(struct device *dev, u64 mask)
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{
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if (!dev->dma_mask || !dma_supported(dev, mask))
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return -EIO;
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*dev->dma_mask = mask;
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return 0;
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}
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static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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return 0;
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}
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/*
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* dma_alloc_noncoherent() returns non-cacheable memory, so there's no need to
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* do any flushing here.
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*/
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static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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}
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/* drivers/base/dma-mapping.c */
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extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size);
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extern int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t dma_addr,
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size_t size);
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#define dma_mmap_coherent(d, v, c, h, s) dma_common_mmap(d, v, c, h, s)
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#define dma_get_sgtable(d, t, v, h, s) dma_common_get_sgtable(d, t, v, h, s)
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#endif /* _ASM_NIOS2_DMA_MAPPING_H */
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