99 lines
3.1 KiB
C
99 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2010 Juergen Beisert, Pengutronix
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* Copyright (C) 2016 Marek Vasut <marex@denx.de>
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*
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* i.MX23/i.MX28/i.MX6SX MXSFB LCD controller driver.
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*/
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#ifndef __MXSFB_REGS_H__
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#define __MXSFB_REGS_H__
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#define REG_SET 4
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#define REG_CLR 8
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#define LCDC_CTRL 0x00
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#define LCDC_CTRL1 0x10
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#define LCDC_V3_TRANSFER_COUNT 0x20
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#define LCDC_V4_TRANSFER_COUNT 0x30
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#define LCDC_V4_CUR_BUF 0x40
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#define LCDC_V4_NEXT_BUF 0x50
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#define LCDC_V3_CUR_BUF 0x30
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#define LCDC_V3_NEXT_BUF 0x40
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#define LCDC_VDCTRL0 0x70
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#define LCDC_VDCTRL1 0x80
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#define LCDC_VDCTRL2 0x90
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#define LCDC_VDCTRL3 0xa0
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#define LCDC_VDCTRL4 0xb0
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#define LCDC_V4_DEBUG0 0x1d0
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#define LCDC_V3_DEBUG0 0x1f0
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#define CTRL_SFTRST BIT(31)
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#define CTRL_CLKGATE BIT(30)
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#define CTRL_BYPASS_COUNT BIT(19)
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#define CTRL_VSYNC_MODE BIT(18)
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#define CTRL_DOTCLK_MODE BIT(17)
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#define CTRL_DATA_SELECT BIT(16)
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#define CTRL_BUS_WIDTH_16 (0 << 10)
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#define CTRL_BUS_WIDTH_8 (1 << 10)
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#define CTRL_BUS_WIDTH_18 (2 << 10)
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#define CTRL_BUS_WIDTH_24 (3 << 10)
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#define CTRL_BUS_WIDTH_MASK (0x3 << 10)
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#define CTRL_WORD_LENGTH_16 (0 << 8)
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#define CTRL_WORD_LENGTH_8 (1 << 8)
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#define CTRL_WORD_LENGTH_18 (2 << 8)
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#define CTRL_WORD_LENGTH_24 (3 << 8)
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#define CTRL_MASTER BIT(5)
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#define CTRL_DF16 BIT(3)
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#define CTRL_DF18 BIT(2)
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#define CTRL_DF24 BIT(1)
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#define CTRL_RUN BIT(0)
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#define CTRL1_FIFO_CLEAR BIT(21)
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#define CTRL1_SET_BYTE_PACKAGING(x) (((x) & 0xf) << 16)
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#define CTRL1_GET_BYTE_PACKAGING(x) (((x) >> 16) & 0xf)
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#define CTRL1_CUR_FRAME_DONE_IRQ_EN BIT(13)
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#define CTRL1_CUR_FRAME_DONE_IRQ BIT(9)
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#define TRANSFER_COUNT_SET_VCOUNT(x) (((x) & 0xffff) << 16)
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#define TRANSFER_COUNT_GET_VCOUNT(x) (((x) >> 16) & 0xffff)
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#define TRANSFER_COUNT_SET_HCOUNT(x) ((x) & 0xffff)
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#define TRANSFER_COUNT_GET_HCOUNT(x) ((x) & 0xffff)
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#define VDCTRL0_ENABLE_PRESENT BIT(28)
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#define VDCTRL0_VSYNC_ACT_HIGH BIT(27)
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#define VDCTRL0_HSYNC_ACT_HIGH BIT(26)
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#define VDCTRL0_DOTCLK_ACT_FALLING BIT(25)
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#define VDCTRL0_ENABLE_ACT_HIGH BIT(24)
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#define VDCTRL0_VSYNC_PERIOD_UNIT BIT(21)
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#define VDCTRL0_VSYNC_PULSE_WIDTH_UNIT BIT(20)
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#define VDCTRL0_HALF_LINE BIT(19)
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#define VDCTRL0_HALF_LINE_MODE BIT(18)
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#define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
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#define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
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#define VDCTRL2_SET_HSYNC_PERIOD(x) ((x) & 0x3ffff)
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#define VDCTRL2_GET_HSYNC_PERIOD(x) ((x) & 0x3ffff)
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#define VDCTRL3_MUX_SYNC_SIGNALS BIT(29)
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#define VDCTRL3_VSYNC_ONLY BIT(28)
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#define SET_HOR_WAIT_CNT(x) (((x) & 0xfff) << 16)
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#define GET_HOR_WAIT_CNT(x) (((x) >> 16) & 0xfff)
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#define SET_VERT_WAIT_CNT(x) ((x) & 0xffff)
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#define GET_VERT_WAIT_CNT(x) ((x) & 0xffff)
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#define VDCTRL4_SET_DOTCLK_DLY(x) (((x) & 0x7) << 29) /* v4 only */
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#define VDCTRL4_GET_DOTCLK_DLY(x) (((x) >> 29) & 0x7) /* v4 only */
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#define VDCTRL4_SYNC_SIGNALS_ON BIT(18)
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#define SET_DOTCLK_H_VALID_DATA_CNT(x) ((x) & 0x3ffff)
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#define DEBUG0_HSYNC BIT(26)
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#define DEBUG0_VSYNC BIT(25)
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#define MXSFB_MIN_XRES 120
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#define MXSFB_MIN_YRES 120
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#define MXSFB_MAX_XRES 0xffff
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#define MXSFB_MAX_YRES 0xffff
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#endif /* __MXSFB_REGS_H__ */
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