471 lines
13 KiB
C
471 lines
13 KiB
C
/*
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* Copyright 2013 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs <bskeggs@redhat.com>
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*/
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#include "gf100.h"
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#include "ctxgf100.h"
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#include <subdev/bios.h>
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#include <subdev/bios/P0260.h>
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#include <nvif/class.h>
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/*******************************************************************************
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* Graphics object classes
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******************************************************************************/
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static struct nvkm_oclass
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gm107_gr_sclass[] = {
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{ FERMI_TWOD_A, &nvkm_object_ofuncs },
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{ KEPLER_INLINE_TO_MEMORY_B, &nvkm_object_ofuncs },
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{ MAXWELL_A, &gf100_fermi_ofuncs, gf100_gr_9097_omthds },
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{ MAXWELL_COMPUTE_A, &nvkm_object_ofuncs, gf100_gr_90c0_omthds },
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{}
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};
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/*******************************************************************************
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* PGRAPH register lists
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******************************************************************************/
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static const struct gf100_gr_init
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gm107_gr_init_main_0[] = {
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{ 0x400080, 1, 0x04, 0x003003c2 },
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{ 0x400088, 1, 0x04, 0x0001bfe7 },
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{ 0x40008c, 1, 0x04, 0x00060000 },
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{ 0x400090, 1, 0x04, 0x00000030 },
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{ 0x40013c, 1, 0x04, 0x003901f3 },
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{ 0x400140, 1, 0x04, 0x00000100 },
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{ 0x400144, 1, 0x04, 0x00000000 },
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{ 0x400148, 1, 0x04, 0x00000110 },
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{ 0x400138, 1, 0x04, 0x00000000 },
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{ 0x400130, 2, 0x04, 0x00000000 },
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{ 0x400124, 1, 0x04, 0x00000002 },
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{}
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};
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static const struct gf100_gr_init
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gm107_gr_init_ds_0[] = {
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{ 0x405844, 1, 0x04, 0x00ffffff },
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{ 0x405850, 1, 0x04, 0x00000000 },
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{ 0x405900, 1, 0x04, 0x00000000 },
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{ 0x405908, 1, 0x04, 0x00000000 },
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{}
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};
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const struct gf100_gr_init
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gm107_gr_init_scc_0[] = {
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{ 0x40803c, 1, 0x04, 0x00000010 },
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{}
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};
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static const struct gf100_gr_init
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gm107_gr_init_sked_0[] = {
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{ 0x407010, 1, 0x04, 0x00000000 },
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{ 0x407040, 1, 0x04, 0x40440424 },
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{ 0x407048, 1, 0x04, 0x0000000a },
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{}
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};
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const struct gf100_gr_init
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gm107_gr_init_prop_0[] = {
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{ 0x418408, 1, 0x04, 0x00000000 },
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{ 0x4184a0, 1, 0x04, 0x00000000 },
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{}
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};
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const struct gf100_gr_init
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gm107_gr_init_setup_1[] = {
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{ 0x4188c8, 2, 0x04, 0x00000000 },
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{ 0x4188d0, 1, 0x04, 0x00010000 },
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{ 0x4188d4, 1, 0x04, 0x00010201 },
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{}
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};
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const struct gf100_gr_init
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gm107_gr_init_zcull_0[] = {
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{ 0x418910, 1, 0x04, 0x00010001 },
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{ 0x418914, 1, 0x04, 0x00000301 },
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{ 0x418918, 1, 0x04, 0x00800000 },
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{ 0x418930, 2, 0x04, 0x00000000 },
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{ 0x418980, 1, 0x04, 0x77777770 },
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{ 0x418984, 3, 0x04, 0x77777777 },
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{}
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};
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const struct gf100_gr_init
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gm107_gr_init_gpc_unk_1[] = {
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{ 0x418d00, 1, 0x04, 0x00000000 },
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{ 0x418f00, 1, 0x04, 0x00000400 },
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{ 0x418f08, 1, 0x04, 0x00000000 },
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{ 0x418e08, 1, 0x04, 0x00000000 },
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{}
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};
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static const struct gf100_gr_init
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gm107_gr_init_tpccs_0[] = {
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{ 0x419dc4, 1, 0x04, 0x00000000 },
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{ 0x419dc8, 1, 0x04, 0x00000501 },
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{ 0x419dd0, 1, 0x04, 0x00000000 },
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{ 0x419dd4, 1, 0x04, 0x00000100 },
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{ 0x419dd8, 1, 0x04, 0x00000001 },
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{ 0x419ddc, 1, 0x04, 0x00000002 },
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{ 0x419de0, 1, 0x04, 0x00000001 },
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{ 0x419d0c, 1, 0x04, 0x00000000 },
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{ 0x419d10, 1, 0x04, 0x00000014 },
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{}
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};
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const struct gf100_gr_init
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gm107_gr_init_tex_0[] = {
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{ 0x419ab0, 1, 0x04, 0x00000000 },
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{ 0x419ab8, 1, 0x04, 0x000000e7 },
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{ 0x419abc, 1, 0x04, 0x00000000 },
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{ 0x419acc, 1, 0x04, 0x000000ff },
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{ 0x419ac0, 1, 0x04, 0x00000000 },
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{ 0x419aa8, 2, 0x04, 0x00000000 },
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{ 0x419ad0, 2, 0x04, 0x00000000 },
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{ 0x419ae0, 2, 0x04, 0x00000000 },
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{ 0x419af0, 4, 0x04, 0x00000000 },
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{}
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};
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static const struct gf100_gr_init
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gm107_gr_init_pe_0[] = {
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{ 0x419900, 1, 0x04, 0x000000ff },
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{ 0x41980c, 1, 0x04, 0x00000010 },
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{ 0x419844, 1, 0x04, 0x00000000 },
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{ 0x419838, 1, 0x04, 0x000000ff },
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{ 0x419850, 1, 0x04, 0x00000004 },
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{ 0x419854, 2, 0x04, 0x00000000 },
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{ 0x419894, 3, 0x04, 0x00100401 },
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{}
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};
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const struct gf100_gr_init
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gm107_gr_init_l1c_0[] = {
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{ 0x419c98, 1, 0x04, 0x00000000 },
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{ 0x419cc0, 2, 0x04, 0x00000000 },
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{}
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};
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static const struct gf100_gr_init
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gm107_gr_init_sm_0[] = {
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{ 0x419e30, 1, 0x04, 0x000000ff },
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{ 0x419e00, 1, 0x04, 0x00000000 },
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{ 0x419ea0, 1, 0x04, 0x00000000 },
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{ 0x419ee4, 1, 0x04, 0x00000000 },
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{ 0x419ea4, 1, 0x04, 0x00000100 },
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{ 0x419ea8, 1, 0x04, 0x01000000 },
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{ 0x419ee8, 1, 0x04, 0x00000091 },
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{ 0x419eb4, 1, 0x04, 0x00000000 },
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{ 0x419ebc, 2, 0x04, 0x00000000 },
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{ 0x419edc, 1, 0x04, 0x000c1810 },
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{ 0x419ed8, 1, 0x04, 0x00000000 },
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{ 0x419ee0, 1, 0x04, 0x00000000 },
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{ 0x419f74, 1, 0x04, 0x00005155 },
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{ 0x419f80, 4, 0x04, 0x00000000 },
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{}
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};
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static const struct gf100_gr_init
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gm107_gr_init_l1c_1[] = {
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{ 0x419ccc, 2, 0x04, 0x00000000 },
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{ 0x419c80, 1, 0x04, 0x3f006022 },
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{ 0x419c88, 1, 0x04, 0x00000000 },
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{}
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};
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static const struct gf100_gr_init
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gm107_gr_init_pes_0[] = {
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{ 0x41be50, 1, 0x04, 0x000000ff },
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{ 0x41be04, 1, 0x04, 0x00000000 },
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{ 0x41be08, 1, 0x04, 0x00000004 },
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{ 0x41be0c, 1, 0x04, 0x00000008 },
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{ 0x41be10, 1, 0x04, 0x0e3b8bc7 },
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{ 0x41be14, 2, 0x04, 0x00000000 },
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{ 0x41be3c, 5, 0x04, 0x00100401 },
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{}
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};
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const struct gf100_gr_init
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gm107_gr_init_wwdx_0[] = {
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{ 0x41bfd4, 1, 0x04, 0x00800000 },
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{ 0x41bfdc, 1, 0x04, 0x00000000 },
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{}
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};
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const struct gf100_gr_init
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gm107_gr_init_cbm_0[] = {
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{ 0x41becc, 1, 0x04, 0x00000000 },
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{}
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};
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static const struct gf100_gr_init
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gm107_gr_init_be_0[] = {
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{ 0x408890, 1, 0x04, 0x000000ff },
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{ 0x40880c, 1, 0x04, 0x00000000 },
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{ 0x408850, 1, 0x04, 0x00000004 },
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{ 0x408878, 1, 0x04, 0x00c81603 },
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{ 0x40887c, 1, 0x04, 0x80543432 },
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{ 0x408880, 1, 0x04, 0x0010581e },
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{ 0x408884, 1, 0x04, 0x00001205 },
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{ 0x408974, 1, 0x04, 0x000000ff },
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{ 0x408910, 9, 0x04, 0x00000000 },
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{ 0x408950, 1, 0x04, 0x00000000 },
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{ 0x408954, 1, 0x04, 0x0000ffff },
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{ 0x408958, 1, 0x04, 0x00000034 },
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{ 0x40895c, 1, 0x04, 0x8531a003 },
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{ 0x408960, 1, 0x04, 0x0561985a },
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{ 0x408964, 1, 0x04, 0x04e15c4f },
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{ 0x408968, 1, 0x04, 0x02808833 },
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{ 0x40896c, 1, 0x04, 0x01f02438 },
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{ 0x408970, 1, 0x04, 0x00012c00 },
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{ 0x408984, 1, 0x04, 0x00000000 },
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{ 0x408988, 1, 0x04, 0x08040201 },
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{ 0x40898c, 1, 0x04, 0x80402010 },
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{}
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};
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static const struct gf100_gr_init
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gm107_gr_init_sm_1[] = {
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{ 0x419e5c, 1, 0x04, 0x00000000 },
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{ 0x419e58, 1, 0x04, 0x00000000 },
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{}
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};
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static const struct gf100_gr_pack
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gm107_gr_pack_mmio[] = {
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{ gm107_gr_init_main_0 },
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{ gk110_gr_init_fe_0 },
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{ gf100_gr_init_pri_0 },
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{ gf100_gr_init_rstr2d_0 },
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{ gf100_gr_init_pd_0 },
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{ gm107_gr_init_ds_0 },
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{ gm107_gr_init_scc_0 },
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{ gm107_gr_init_sked_0 },
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{ gk110_gr_init_cwd_0 },
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{ gm107_gr_init_prop_0 },
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{ gk208_gr_init_gpc_unk_0 },
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{ gf100_gr_init_setup_0 },
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{ gf100_gr_init_crstr_0 },
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{ gm107_gr_init_setup_1 },
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{ gm107_gr_init_zcull_0 },
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{ gf100_gr_init_gpm_0 },
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{ gm107_gr_init_gpc_unk_1 },
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{ gf100_gr_init_gcc_0 },
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{ gm107_gr_init_tpccs_0 },
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{ gm107_gr_init_tex_0 },
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{ gm107_gr_init_pe_0 },
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{ gm107_gr_init_l1c_0 },
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{ gf100_gr_init_mpc_0 },
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{ gm107_gr_init_sm_0 },
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{ gm107_gr_init_l1c_1 },
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{ gm107_gr_init_pes_0 },
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{ gm107_gr_init_wwdx_0 },
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{ gm107_gr_init_cbm_0 },
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{ gm107_gr_init_be_0 },
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{ gm107_gr_init_sm_1 },
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{}
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};
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/*******************************************************************************
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* PGRAPH engine/subdev functions
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******************************************************************************/
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void
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gm107_gr_init_bios(struct gf100_gr_priv *priv)
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{
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static const struct {
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u32 ctrl;
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u32 data;
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} regs[] = {
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{ 0x419ed8, 0x419ee0 },
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{ 0x419ad0, 0x419ad4 },
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{ 0x419ae0, 0x419ae4 },
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{ 0x419af0, 0x419af4 },
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{ 0x419af8, 0x419afc },
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};
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struct nvkm_bios *bios = nvkm_bios(priv);
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struct nvbios_P0260E infoE;
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struct nvbios_P0260X infoX;
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int E = -1, X;
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u8 ver, hdr;
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while (nvbios_P0260Ep(bios, ++E, &ver, &hdr, &infoE)) {
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if (X = -1, E < ARRAY_SIZE(regs)) {
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nv_wr32(priv, regs[E].ctrl, infoE.data);
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while (nvbios_P0260Xp(bios, ++X, &ver, &hdr, &infoX))
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nv_wr32(priv, regs[E].data, infoX.data);
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}
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}
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}
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int
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gm107_gr_init(struct nvkm_object *object)
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{
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struct gf100_gr_oclass *oclass = (void *)object->oclass;
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struct gf100_gr_priv *priv = (void *)object;
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const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, priv->tpc_total);
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u32 data[TPC_MAX / 8] = {};
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u8 tpcnr[GPC_MAX];
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int gpc, tpc, ppc, rop;
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int ret, i;
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ret = nvkm_gr_init(&priv->base);
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if (ret)
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return ret;
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nv_wr32(priv, GPC_BCAST(0x0880), 0x00000000);
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nv_wr32(priv, GPC_BCAST(0x0890), 0x00000000);
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nv_wr32(priv, GPC_BCAST(0x0894), 0x00000000);
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nv_wr32(priv, GPC_BCAST(0x08b4), priv->unk4188b4->addr >> 8);
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nv_wr32(priv, GPC_BCAST(0x08b8), priv->unk4188b8->addr >> 8);
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gf100_gr_mmio(priv, oclass->mmio);
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gm107_gr_init_bios(priv);
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nv_wr32(priv, GPC_UNIT(0, 0x3018), 0x00000001);
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memset(data, 0x00, sizeof(data));
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memcpy(tpcnr, priv->tpc_nr, sizeof(priv->tpc_nr));
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for (i = 0, gpc = -1; i < priv->tpc_total; i++) {
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do {
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gpc = (gpc + 1) % priv->gpc_nr;
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} while (!tpcnr[gpc]);
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tpc = priv->tpc_nr[gpc] - tpcnr[gpc]--;
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data[i / 8] |= tpc << ((i % 8) * 4);
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}
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nv_wr32(priv, GPC_BCAST(0x0980), data[0]);
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nv_wr32(priv, GPC_BCAST(0x0984), data[1]);
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nv_wr32(priv, GPC_BCAST(0x0988), data[2]);
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nv_wr32(priv, GPC_BCAST(0x098c), data[3]);
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for (gpc = 0; gpc < priv->gpc_nr; gpc++) {
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nv_wr32(priv, GPC_UNIT(gpc, 0x0914),
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priv->magic_not_rop_nr << 8 | priv->tpc_nr[gpc]);
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nv_wr32(priv, GPC_UNIT(gpc, 0x0910), 0x00040000 |
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priv->tpc_total);
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nv_wr32(priv, GPC_UNIT(gpc, 0x0918), magicgpc918);
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}
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nv_wr32(priv, GPC_BCAST(0x3fd4), magicgpc918);
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nv_wr32(priv, GPC_BCAST(0x08ac), nv_rd32(priv, 0x100800));
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nv_wr32(priv, 0x400500, 0x00010001);
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nv_wr32(priv, 0x400100, 0xffffffff);
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nv_wr32(priv, 0x40013c, 0xffffffff);
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nv_wr32(priv, 0x400124, 0x00000002);
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nv_wr32(priv, 0x409c24, 0x000e0000);
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nv_wr32(priv, 0x404000, 0xc0000000);
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nv_wr32(priv, 0x404600, 0xc0000000);
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nv_wr32(priv, 0x408030, 0xc0000000);
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nv_wr32(priv, 0x404490, 0xc0000000);
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nv_wr32(priv, 0x406018, 0xc0000000);
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nv_wr32(priv, 0x407020, 0x40000000);
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nv_wr32(priv, 0x405840, 0xc0000000);
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nv_wr32(priv, 0x405844, 0x00ffffff);
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nv_mask(priv, 0x419cc0, 0x00000008, 0x00000008);
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for (gpc = 0; gpc < priv->gpc_nr; gpc++) {
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for (ppc = 0; ppc < 2 /* priv->ppc_nr[gpc] */; ppc++)
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nv_wr32(priv, PPC_UNIT(gpc, ppc, 0x038), 0xc0000000);
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nv_wr32(priv, GPC_UNIT(gpc, 0x0420), 0xc0000000);
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nv_wr32(priv, GPC_UNIT(gpc, 0x0900), 0xc0000000);
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nv_wr32(priv, GPC_UNIT(gpc, 0x1028), 0xc0000000);
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nv_wr32(priv, GPC_UNIT(gpc, 0x0824), 0xc0000000);
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for (tpc = 0; tpc < priv->tpc_nr[gpc]; tpc++) {
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nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x508), 0xffffffff);
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nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
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nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x224), 0xc0000000);
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nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x48c), 0xc0000000);
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nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
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nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
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nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
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nv_wr32(priv, TPC_UNIT(gpc, tpc, 0x64c), 0x00000005);
|
|
}
|
|
nv_wr32(priv, GPC_UNIT(gpc, 0x2c90), 0xffffffff);
|
|
nv_wr32(priv, GPC_UNIT(gpc, 0x2c94), 0xffffffff);
|
|
}
|
|
|
|
for (rop = 0; rop < priv->rop_nr; rop++) {
|
|
nv_wr32(priv, ROP_UNIT(rop, 0x144), 0x40000000);
|
|
nv_wr32(priv, ROP_UNIT(rop, 0x070), 0x40000000);
|
|
nv_wr32(priv, ROP_UNIT(rop, 0x204), 0xffffffff);
|
|
nv_wr32(priv, ROP_UNIT(rop, 0x208), 0xffffffff);
|
|
}
|
|
|
|
nv_wr32(priv, 0x400108, 0xffffffff);
|
|
nv_wr32(priv, 0x400138, 0xffffffff);
|
|
nv_wr32(priv, 0x400118, 0xffffffff);
|
|
nv_wr32(priv, 0x400130, 0xffffffff);
|
|
nv_wr32(priv, 0x40011c, 0xffffffff);
|
|
nv_wr32(priv, 0x400134, 0xffffffff);
|
|
|
|
nv_wr32(priv, 0x400054, 0x2c350f63);
|
|
|
|
gf100_gr_zbc_init(priv);
|
|
|
|
return gf100_gr_init_ctxctl(priv);
|
|
}
|
|
|
|
#include "fuc/hubgm107.fuc5.h"
|
|
|
|
static struct gf100_gr_ucode
|
|
gm107_gr_fecs_ucode = {
|
|
.code.data = gm107_grhub_code,
|
|
.code.size = sizeof(gm107_grhub_code),
|
|
.data.data = gm107_grhub_data,
|
|
.data.size = sizeof(gm107_grhub_data),
|
|
};
|
|
|
|
#include "fuc/gpcgm107.fuc5.h"
|
|
|
|
static struct gf100_gr_ucode
|
|
gm107_gr_gpccs_ucode = {
|
|
.code.data = gm107_grgpc_code,
|
|
.code.size = sizeof(gm107_grgpc_code),
|
|
.data.data = gm107_grgpc_data,
|
|
.data.size = sizeof(gm107_grgpc_data),
|
|
};
|
|
|
|
struct nvkm_oclass *
|
|
gm107_gr_oclass = &(struct gf100_gr_oclass) {
|
|
.base.handle = NV_ENGINE(GR, 0x07),
|
|
.base.ofuncs = &(struct nvkm_ofuncs) {
|
|
.ctor = gf100_gr_ctor,
|
|
.dtor = gf100_gr_dtor,
|
|
.init = gm107_gr_init,
|
|
.fini = _nvkm_gr_fini,
|
|
},
|
|
.cclass = &gm107_grctx_oclass,
|
|
.sclass = gm107_gr_sclass,
|
|
.mmio = gm107_gr_pack_mmio,
|
|
.fecs.ucode = &gm107_gr_fecs_ucode,
|
|
.gpccs.ucode = &gm107_gr_gpccs_ucode,
|
|
.ppc_nr = 2,
|
|
}.base;
|