529 lines
14 KiB
C
529 lines
14 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Copyright (C) 2012 ARM Limited
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*/
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#include <linux/err.h>
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#include <linux/gpio.h>
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#include <linux/io.h>
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#include <linux/leds.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/driver.h>
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#include <linux/slab.h>
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#include <linux/stat.h>
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#include <linux/timer.h>
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#include <linux/vexpress.h>
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#define SYS_ID 0x000
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#define SYS_SW 0x004
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#define SYS_LED 0x008
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#define SYS_100HZ 0x024
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#define SYS_FLAGS 0x030
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#define SYS_FLAGSSET 0x030
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#define SYS_FLAGSCLR 0x034
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#define SYS_NVFLAGS 0x038
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#define SYS_NVFLAGSSET 0x038
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#define SYS_NVFLAGSCLR 0x03c
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#define SYS_MCI 0x048
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#define SYS_FLASH 0x04c
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#define SYS_CFGSW 0x058
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#define SYS_24MHZ 0x05c
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#define SYS_MISC 0x060
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#define SYS_DMA 0x064
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#define SYS_PROCID0 0x084
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#define SYS_PROCID1 0x088
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#define SYS_CFGDATA 0x0a0
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#define SYS_CFGCTRL 0x0a4
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#define SYS_CFGSTAT 0x0a8
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#define SYS_HBI_MASK 0xfff
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#define SYS_ID_HBI_SHIFT 16
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#define SYS_PROCIDx_HBI_SHIFT 0
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#define SYS_LED_LED(n) (1 << (n))
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#define SYS_MCI_CARDIN (1 << 0)
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#define SYS_MCI_WPROT (1 << 1)
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#define SYS_FLASH_WPn (1 << 0)
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#define SYS_MISC_MASTERSITE (1 << 14)
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#define SYS_CFGCTRL_START (1 << 31)
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#define SYS_CFGCTRL_WRITE (1 << 30)
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#define SYS_CFGCTRL_DCC(n) (((n) & 0xf) << 26)
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#define SYS_CFGCTRL_FUNC(n) (((n) & 0x3f) << 20)
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#define SYS_CFGCTRL_SITE(n) (((n) & 0x3) << 16)
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#define SYS_CFGCTRL_POSITION(n) (((n) & 0xf) << 12)
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#define SYS_CFGCTRL_DEVICE(n) (((n) & 0xfff) << 0)
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#define SYS_CFGSTAT_ERR (1 << 1)
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#define SYS_CFGSTAT_COMPLETE (1 << 0)
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static void __iomem *vexpress_sysreg_base;
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static struct device *vexpress_sysreg_dev;
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static int vexpress_master_site;
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void vexpress_flags_set(u32 data)
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{
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writel(~0, vexpress_sysreg_base + SYS_FLAGSCLR);
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writel(data, vexpress_sysreg_base + SYS_FLAGSSET);
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}
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u32 vexpress_get_procid(int site)
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{
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if (site == VEXPRESS_SITE_MASTER)
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site = vexpress_master_site;
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return readl(vexpress_sysreg_base + (site == VEXPRESS_SITE_DB1 ?
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SYS_PROCID0 : SYS_PROCID1));
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}
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u32 vexpress_get_hbi(int site)
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{
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u32 id;
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switch (site) {
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case VEXPRESS_SITE_MB:
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id = readl(vexpress_sysreg_base + SYS_ID);
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return (id >> SYS_ID_HBI_SHIFT) & SYS_HBI_MASK;
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case VEXPRESS_SITE_MASTER:
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case VEXPRESS_SITE_DB1:
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case VEXPRESS_SITE_DB2:
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id = vexpress_get_procid(site);
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return (id >> SYS_PROCIDx_HBI_SHIFT) & SYS_HBI_MASK;
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}
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return ~0;
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}
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void __iomem *vexpress_get_24mhz_clock_base(void)
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{
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return vexpress_sysreg_base + SYS_24MHZ;
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}
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static void vexpress_sysreg_find_prop(struct device_node *node,
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const char *name, u32 *val)
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{
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of_node_get(node);
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while (node) {
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if (of_property_read_u32(node, name, val) == 0) {
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of_node_put(node);
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return;
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}
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node = of_get_next_parent(node);
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}
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}
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unsigned __vexpress_get_site(struct device *dev, struct device_node *node)
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{
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u32 site = 0;
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WARN_ON(dev && node && dev->of_node != node);
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if (dev && !node)
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node = dev->of_node;
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if (node) {
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vexpress_sysreg_find_prop(node, "arm,vexpress,site", &site);
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} else if (dev && dev->bus == &platform_bus_type) {
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struct platform_device *pdev = to_platform_device(dev);
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if (pdev->num_resources == 1 &&
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pdev->resource[0].flags == IORESOURCE_BUS)
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site = pdev->resource[0].start;
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} else if (dev && strncmp(dev_name(dev), "ct:", 3) == 0) {
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site = VEXPRESS_SITE_MASTER;
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}
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if (site == VEXPRESS_SITE_MASTER)
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site = vexpress_master_site;
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return site;
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}
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struct vexpress_sysreg_config_func {
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u32 template;
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u32 device;
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};
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static struct vexpress_config_bridge *vexpress_sysreg_config_bridge;
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static struct timer_list vexpress_sysreg_config_timer;
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static u32 *vexpress_sysreg_config_data;
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static int vexpress_sysreg_config_tries;
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static void *vexpress_sysreg_config_func_get(struct device *dev,
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struct device_node *node)
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{
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struct vexpress_sysreg_config_func *config_func;
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u32 site;
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u32 position = 0;
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u32 dcc = 0;
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u32 func_device[2];
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int err = -EFAULT;
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if (node) {
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of_node_get(node);
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vexpress_sysreg_find_prop(node, "arm,vexpress,site", &site);
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vexpress_sysreg_find_prop(node, "arm,vexpress,position",
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&position);
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vexpress_sysreg_find_prop(node, "arm,vexpress,dcc", &dcc);
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err = of_property_read_u32_array(node,
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"arm,vexpress-sysreg,func", func_device,
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ARRAY_SIZE(func_device));
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of_node_put(node);
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} else if (dev && dev->bus == &platform_bus_type) {
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struct platform_device *pdev = to_platform_device(dev);
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if (pdev->num_resources == 1 &&
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pdev->resource[0].flags == IORESOURCE_BUS) {
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site = pdev->resource[0].start;
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func_device[0] = pdev->resource[0].end;
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func_device[1] = pdev->id;
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err = 0;
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}
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}
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if (err)
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return NULL;
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config_func = kzalloc(sizeof(*config_func), GFP_KERNEL);
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if (!config_func)
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return NULL;
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config_func->template = SYS_CFGCTRL_DCC(dcc);
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config_func->template |= SYS_CFGCTRL_FUNC(func_device[0]);
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config_func->template |= SYS_CFGCTRL_SITE(site == VEXPRESS_SITE_MASTER ?
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vexpress_master_site : site);
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config_func->template |= SYS_CFGCTRL_POSITION(position);
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config_func->device |= func_device[1];
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dev_dbg(vexpress_sysreg_dev, "func 0x%p = 0x%x, %d\n", config_func,
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config_func->template, config_func->device);
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return config_func;
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}
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static void vexpress_sysreg_config_func_put(void *func)
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{
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kfree(func);
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}
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static int vexpress_sysreg_config_func_exec(void *func, int offset,
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bool write, u32 *data)
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{
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int status;
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struct vexpress_sysreg_config_func *config_func = func;
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u32 command;
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if (WARN_ON(!vexpress_sysreg_base))
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return -ENOENT;
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command = readl(vexpress_sysreg_base + SYS_CFGCTRL);
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if (WARN_ON(command & SYS_CFGCTRL_START))
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return -EBUSY;
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command = SYS_CFGCTRL_START;
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command |= write ? SYS_CFGCTRL_WRITE : 0;
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command |= config_func->template;
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command |= SYS_CFGCTRL_DEVICE(config_func->device + offset);
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/* Use a canary for reads */
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if (!write)
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*data = 0xdeadbeef;
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dev_dbg(vexpress_sysreg_dev, "command %x, data %x\n",
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command, *data);
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writel(*data, vexpress_sysreg_base + SYS_CFGDATA);
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writel(0, vexpress_sysreg_base + SYS_CFGSTAT);
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writel(command, vexpress_sysreg_base + SYS_CFGCTRL);
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mb();
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if (vexpress_sysreg_dev) {
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/* Schedule completion check */
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if (!write)
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vexpress_sysreg_config_data = data;
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vexpress_sysreg_config_tries = 100;
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mod_timer(&vexpress_sysreg_config_timer,
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jiffies + usecs_to_jiffies(100));
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status = VEXPRESS_CONFIG_STATUS_WAIT;
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} else {
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/* Early execution, no timer available, have to spin */
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u32 cfgstat;
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do {
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cpu_relax();
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cfgstat = readl(vexpress_sysreg_base + SYS_CFGSTAT);
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} while (!cfgstat);
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if (!write && (cfgstat & SYS_CFGSTAT_COMPLETE))
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*data = readl(vexpress_sysreg_base + SYS_CFGDATA);
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status = VEXPRESS_CONFIG_STATUS_DONE;
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if (cfgstat & SYS_CFGSTAT_ERR)
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status = -EINVAL;
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}
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return status;
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}
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struct vexpress_config_bridge_info vexpress_sysreg_config_bridge_info = {
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.name = "vexpress-sysreg",
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.func_get = vexpress_sysreg_config_func_get,
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.func_put = vexpress_sysreg_config_func_put,
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.func_exec = vexpress_sysreg_config_func_exec,
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};
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static void vexpress_sysreg_config_complete(unsigned long data)
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{
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int status = VEXPRESS_CONFIG_STATUS_DONE;
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u32 cfgstat = readl(vexpress_sysreg_base + SYS_CFGSTAT);
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if (cfgstat & SYS_CFGSTAT_ERR)
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status = -EINVAL;
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if (!vexpress_sysreg_config_tries--)
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status = -ETIMEDOUT;
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if (status < 0) {
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dev_err(vexpress_sysreg_dev, "error %d\n", status);
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} else if (!(cfgstat & SYS_CFGSTAT_COMPLETE)) {
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mod_timer(&vexpress_sysreg_config_timer,
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jiffies + usecs_to_jiffies(50));
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return;
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}
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if (vexpress_sysreg_config_data) {
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*vexpress_sysreg_config_data = readl(vexpress_sysreg_base +
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SYS_CFGDATA);
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dev_dbg(vexpress_sysreg_dev, "read data %x\n",
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*vexpress_sysreg_config_data);
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vexpress_sysreg_config_data = NULL;
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}
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vexpress_config_complete(vexpress_sysreg_config_bridge, status);
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}
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void vexpress_sysreg_setup(struct device_node *node)
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{
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if (WARN_ON(!vexpress_sysreg_base))
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return;
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if (readl(vexpress_sysreg_base + SYS_MISC) & SYS_MISC_MASTERSITE)
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vexpress_master_site = VEXPRESS_SITE_DB2;
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else
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vexpress_master_site = VEXPRESS_SITE_DB1;
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vexpress_sysreg_config_bridge = vexpress_config_bridge_register(
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node, &vexpress_sysreg_config_bridge_info);
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WARN_ON(!vexpress_sysreg_config_bridge);
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}
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void __init vexpress_sysreg_early_init(void __iomem *base)
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{
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vexpress_sysreg_base = base;
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vexpress_sysreg_setup(NULL);
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}
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void __init vexpress_sysreg_of_early_init(void)
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{
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struct device_node *node;
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if (vexpress_sysreg_base)
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return;
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node = of_find_compatible_node(NULL, NULL, "arm,vexpress-sysreg");
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if (node) {
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vexpress_sysreg_base = of_iomap(node, 0);
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vexpress_sysreg_setup(node);
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}
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}
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#ifdef CONFIG_GPIOLIB
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#define VEXPRESS_SYSREG_GPIO(_name, _reg, _value) \
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[VEXPRESS_GPIO_##_name] = { \
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.reg = _reg, \
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.value = _reg##_##_value, \
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}
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static struct vexpress_sysreg_gpio {
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unsigned long reg;
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u32 value;
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} vexpress_sysreg_gpios[] = {
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VEXPRESS_SYSREG_GPIO(MMC_CARDIN, SYS_MCI, CARDIN),
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VEXPRESS_SYSREG_GPIO(MMC_WPROT, SYS_MCI, WPROT),
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VEXPRESS_SYSREG_GPIO(FLASH_WPn, SYS_FLASH, WPn),
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VEXPRESS_SYSREG_GPIO(LED0, SYS_LED, LED(0)),
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VEXPRESS_SYSREG_GPIO(LED1, SYS_LED, LED(1)),
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VEXPRESS_SYSREG_GPIO(LED2, SYS_LED, LED(2)),
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VEXPRESS_SYSREG_GPIO(LED3, SYS_LED, LED(3)),
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VEXPRESS_SYSREG_GPIO(LED4, SYS_LED, LED(4)),
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VEXPRESS_SYSREG_GPIO(LED5, SYS_LED, LED(5)),
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VEXPRESS_SYSREG_GPIO(LED6, SYS_LED, LED(6)),
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VEXPRESS_SYSREG_GPIO(LED7, SYS_LED, LED(7)),
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};
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static int vexpress_sysreg_gpio_direction_input(struct gpio_chip *chip,
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unsigned offset)
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{
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return 0;
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}
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static int vexpress_sysreg_gpio_get(struct gpio_chip *chip,
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unsigned offset)
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{
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struct vexpress_sysreg_gpio *gpio = &vexpress_sysreg_gpios[offset];
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u32 reg_value = readl(vexpress_sysreg_base + gpio->reg);
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return !!(reg_value & gpio->value);
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}
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static void vexpress_sysreg_gpio_set(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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struct vexpress_sysreg_gpio *gpio = &vexpress_sysreg_gpios[offset];
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u32 reg_value = readl(vexpress_sysreg_base + gpio->reg);
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if (value)
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reg_value |= gpio->value;
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else
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reg_value &= ~gpio->value;
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writel(reg_value, vexpress_sysreg_base + gpio->reg);
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}
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static int vexpress_sysreg_gpio_direction_output(struct gpio_chip *chip,
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unsigned offset, int value)
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{
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vexpress_sysreg_gpio_set(chip, offset, value);
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return 0;
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}
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static struct gpio_chip vexpress_sysreg_gpio_chip = {
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.label = "vexpress-sysreg",
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.direction_input = vexpress_sysreg_gpio_direction_input,
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.direction_output = vexpress_sysreg_gpio_direction_output,
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.get = vexpress_sysreg_gpio_get,
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.set = vexpress_sysreg_gpio_set,
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.ngpio = ARRAY_SIZE(vexpress_sysreg_gpios),
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.base = 0,
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};
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#define VEXPRESS_SYSREG_GREEN_LED(_name, _default_trigger, _gpio) \
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{ \
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.name = "v2m:green:"_name, \
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.default_trigger = _default_trigger, \
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.gpio = VEXPRESS_GPIO_##_gpio, \
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}
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struct gpio_led vexpress_sysreg_leds[] = {
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VEXPRESS_SYSREG_GREEN_LED("user1", "heartbeat", LED0),
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VEXPRESS_SYSREG_GREEN_LED("user2", "mmc0", LED1),
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VEXPRESS_SYSREG_GREEN_LED("user3", "cpu0", LED2),
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VEXPRESS_SYSREG_GREEN_LED("user4", "cpu1", LED3),
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VEXPRESS_SYSREG_GREEN_LED("user5", "cpu2", LED4),
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VEXPRESS_SYSREG_GREEN_LED("user6", "cpu3", LED5),
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VEXPRESS_SYSREG_GREEN_LED("user7", "cpu4", LED6),
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VEXPRESS_SYSREG_GREEN_LED("user8", "cpu5", LED7),
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};
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struct gpio_led_platform_data vexpress_sysreg_leds_pdata = {
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.num_leds = ARRAY_SIZE(vexpress_sysreg_leds),
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.leds = vexpress_sysreg_leds,
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};
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#endif
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static ssize_t vexpress_sysreg_sys_id_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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return sprintf(buf, "0x%08x\n", readl(vexpress_sysreg_base + SYS_ID));
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}
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DEVICE_ATTR(sys_id, S_IRUGO, vexpress_sysreg_sys_id_show, NULL);
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static int vexpress_sysreg_probe(struct platform_device *pdev)
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{
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int err;
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struct resource *res = platform_get_resource(pdev,
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IORESOURCE_MEM, 0);
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if (!devm_request_mem_region(&pdev->dev, res->start,
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resource_size(res), pdev->name)) {
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dev_err(&pdev->dev, "Failed to request memory region!\n");
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return -EBUSY;
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}
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if (!vexpress_sysreg_base) {
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vexpress_sysreg_base = devm_ioremap(&pdev->dev, res->start,
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resource_size(res));
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vexpress_sysreg_setup(pdev->dev.of_node);
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}
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if (!vexpress_sysreg_base) {
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dev_err(&pdev->dev, "Failed to obtain base address!\n");
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return -EFAULT;
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}
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setup_timer(&vexpress_sysreg_config_timer,
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vexpress_sysreg_config_complete, 0);
|
|
|
|
vexpress_sysreg_dev = &pdev->dev;
|
|
|
|
#ifdef CONFIG_GPIOLIB
|
|
vexpress_sysreg_gpio_chip.dev = &pdev->dev;
|
|
err = gpiochip_add(&vexpress_sysreg_gpio_chip);
|
|
if (err) {
|
|
vexpress_config_bridge_unregister(
|
|
vexpress_sysreg_config_bridge);
|
|
dev_err(&pdev->dev, "Failed to register GPIO chip! (%d)\n",
|
|
err);
|
|
return err;
|
|
}
|
|
|
|
platform_device_register_data(vexpress_sysreg_dev, "leds-gpio",
|
|
PLATFORM_DEVID_AUTO, &vexpress_sysreg_leds_pdata,
|
|
sizeof(vexpress_sysreg_leds_pdata));
|
|
#endif
|
|
|
|
device_create_file(vexpress_sysreg_dev, &dev_attr_sys_id);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id vexpress_sysreg_match[] = {
|
|
{ .compatible = "arm,vexpress-sysreg", },
|
|
{},
|
|
};
|
|
|
|
static struct platform_driver vexpress_sysreg_driver = {
|
|
.driver = {
|
|
.name = "vexpress-sysreg",
|
|
.of_match_table = vexpress_sysreg_match,
|
|
},
|
|
.probe = vexpress_sysreg_probe,
|
|
};
|
|
|
|
static int __init vexpress_sysreg_init(void)
|
|
{
|
|
vexpress_sysreg_of_early_init();
|
|
return platform_driver_register(&vexpress_sysreg_driver);
|
|
}
|
|
core_initcall(vexpress_sysreg_init);
|