101 lines
4.5 KiB
C
101 lines
4.5 KiB
C
/*
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* Copyright 2011 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef PP_SMC_H
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#define PP_SMC_H
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#pragma pack(push, 1)
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#define PPSMC_SWSTATE_FLAG_DC 0x01
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#define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
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#define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
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#define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
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#define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
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#define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
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#define PPSMC_SYSTEMFLAG_GDDR5 0x04
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#define PPSMC_SYSTEMFLAG_DISABLE_BABYSTEP 0x08
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#define PPSMC_SYSTEMFLAG_REGULATOR_HOT 0x10
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#define PPSMC_EXTRAFLAGS_AC2DC_ACTION_MASK 0x07
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#define PPSMC_EXTRAFLAGS_AC2DC_DONT_WAIT_FOR_VBLANK 0x08
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#define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTODPMLOWSTATE 0x00
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#define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTOINITIALSTATE 0x01
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#define PPSMC_DISPLAY_WATERMARK_LOW 0
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#define PPSMC_DISPLAY_WATERMARK_HIGH 1
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#define PPSMC_STATEFLAG_AUTO_PULSE_SKIP 0x01
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#define PPSMC_STATEFLAG_POWERBOOST 0x02
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#define PPSMC_Result_OK ((uint8_t)0x01)
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#define PPSMC_Result_Failed ((uint8_t)0xFF)
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typedef uint8_t PPSMC_Result;
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#define PPSMC_MSG_Halt ((uint8_t)0x10)
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#define PPSMC_MSG_Resume ((uint8_t)0x11)
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#define PPSMC_MSG_ZeroLevelsDisabled ((uint8_t)0x13)
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#define PPSMC_MSG_OneLevelsDisabled ((uint8_t)0x14)
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#define PPSMC_MSG_TwoLevelsDisabled ((uint8_t)0x15)
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#define PPSMC_MSG_EnableThermalInterrupt ((uint8_t)0x16)
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#define PPSMC_MSG_RunningOnAC ((uint8_t)0x17)
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#define PPSMC_MSG_SwitchToSwState ((uint8_t)0x20)
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#define PPSMC_MSG_SwitchToInitialState ((uint8_t)0x40)
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#define PPSMC_MSG_NoForcedLevel ((uint8_t)0x41)
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#define PPSMC_MSG_SwitchToMinimumPower ((uint8_t)0x51)
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#define PPSMC_MSG_ResumeFromMinimumPower ((uint8_t)0x52)
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#define PPSMC_MSG_EnableCac ((uint8_t)0x53)
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#define PPSMC_MSG_DisableCac ((uint8_t)0x54)
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#define PPSMC_TDPClampingActive ((uint8_t)0x59)
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#define PPSMC_TDPClampingInactive ((uint8_t)0x5A)
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#define PPSMC_MSG_NoDisplay ((uint8_t)0x5D)
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#define PPSMC_MSG_HasDisplay ((uint8_t)0x5E)
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#define PPSMC_MSG_UVDPowerOFF ((uint8_t)0x60)
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#define PPSMC_MSG_UVDPowerON ((uint8_t)0x61)
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#define PPSMC_MSG_EnableULV ((uint8_t)0x62)
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#define PPSMC_MSG_DisableULV ((uint8_t)0x63)
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#define PPSMC_MSG_EnterULV ((uint8_t)0x64)
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#define PPSMC_MSG_ExitULV ((uint8_t)0x65)
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#define PPSMC_CACLongTermAvgEnable ((uint8_t)0x6E)
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#define PPSMC_CACLongTermAvgDisable ((uint8_t)0x6F)
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#define PPSMC_MSG_CollectCAC_PowerCorreln ((uint8_t)0x7A)
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#define PPSMC_MSG_SetEnabledLevels ((uint8_t)0x82)
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#define PPSMC_MSG_SetForcedLevels ((uint8_t)0x83)
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#define PPSMC_MSG_ResetToDefaults ((uint8_t)0x84)
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/* TN */
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#define PPSMC_MSG_DPM_Config ((uint32_t) 0x102)
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#define PPSMC_MSG_DPM_ForceState ((uint32_t) 0x104)
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#define PPSMC_MSG_PG_SIMD_Config ((uint32_t) 0x108)
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#define PPSMC_MSG_DCE_RemoveVoltageAdjustment ((uint32_t) 0x11d)
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#define PPSMC_MSG_DCE_AllowVoltageAdjustment ((uint32_t) 0x11e)
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#define PPSMC_MSG_UVD_DPM_Config ((uint32_t) 0x124)
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typedef uint16_t PPSMC_Msg;
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#pragma pack(pop)
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#endif
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