Andrea Parri a2977c0ca3 membarrier: riscv: Add full memory barrier in switch_mm() ... commit d6cfd1770f20392d7009ae1fdb04733794514fa9 upstream. The membarrier system call requires a full memory barrier after storing to rq->curr, before going back to user-space. The barrier is only needed when switching between processes: the barrier is implied by mmdrop() when switching from kernel to userspace, and it's not needed when switching from userspace to kernel. Rely on the feature/mechanism ARCH_HAS_MEMBARRIER_CALLBACKS and on the primitive membarrier_arch_switch_mm(), already adopted by the PowerPC architecture, to insert the required barrier. Fixes: fab957c11e ("RISC-V: Atomic and Locking Code") Signed-off-by: Andrea Parri <parri.andrea@gmail.com> Reviewed-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> Link: https://lore.kernel.org/r/20240131144936.29190-2-parri.andrea@gmail.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: WangYuli <wangyuli@uniontech.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2024-09-12 11:11:45 +02:00
..
Makefile	riscv: mm: Only compile pgtable.c if MMU	2024-09-12 11:11:40 +02:00
cache-ops.c	riscv: split cache ops out of dma-noncoherent.c	2023-11-28 17:19:49 +00:00
cacheflush.c	riscv: implement the new page table range API	2023-08-24 16:20:23 -07:00
context.c	membarrier: riscv: Add full memory barrier in switch_mm()	2024-09-12 11:11:45 +02:00
dma-noncoherent.c	riscv: split cache ops out of dma-noncoherent.c	2023-11-28 17:19:49 +00:00
extable.c	riscv: extable: fix err reg writing in dedicated uaccess handler	2022-02-08 17:02:47 -08:00
fault.c	riscv: Use accessors to page table entries instead of direct dereference	2024-09-12 11:11:40 +02:00
hugetlbpage.c	riscv: Use accessors to page table entries instead of direct dereference	2024-09-12 11:11:40 +02:00
init.c	riscv: Do not restrict memory size because of linear mapping on nommu	2024-09-12 11:11:45 +02:00
kasan_init.c	riscv: Use accessors to page table entries instead of direct dereference	2024-09-12 11:11:40 +02:00
pageattr.c	riscv: Use accessors to page table entries instead of direct dereference	2024-09-12 11:11:40 +02:00
pgtable.c	riscv: Use accessors to page table entries instead of direct dereference	2024-09-12 11:11:40 +02:00
physaddr.c	riscv: Use PUD/P4D/PGD pages for the linear mapping	2023-04-18 20:43:04 -07:00
pmem.c	riscv: mm: dma-noncoherent: nonstandard cache operations support	2023-09-01 09:08:57 -07:00
ptdump.c	riscv: correct pt_level name via pgtable_l5/4_enabled	2023-11-28 17:20:13 +00:00
tlbflush.c	riscv: Apply SiFive CIP-1200 workaround to single-ASID sfence.vma	2024-07-11 12:49:06 +02:00