William Qiu bd9c3c2d7e riscv: dts: starfive: add assigned-clock* to limit frquency ... commit af571133f7ae028ec9b5fdab78f483af13bf28d3 upstream. In JH7110 SoC, we need to go by-pass mode, so we need add the assigned-clock* properties to limit clock frquency. Signed-off-by: William Qiu <william.qiu@starfivetech.com> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: WangYuli <wangyuli@uniontech.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2024-09-18 19:24:10 +02:00
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dts	riscv: dts: starfive: add assigned-clock* to limit frquency	2024-09-18 19:24:10 +02:00
.gitignore	riscv: efi: enable generic EFI compressed boot	2022-09-20 09:50:30 +02:00
Makefile	riscv: boot: Fix creation of loader.bin	2023-11-20 11:59:35 +01:00
install.sh	kbuild: factor out the common installation code into scripts/install.sh	2022-05-11 21:45:53 +09:00
loader.S	riscv: provide a flat image loader	2019-11-17 15:17:39 -08:00
loader.lds.S	riscv: Move kernel mapping outside of linear mapping	2021-04-26 08:25:04 -07:00