325 lines
7.8 KiB
C
325 lines
7.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Out of line spinlock code.
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*
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* Copyright IBM Corp. 2004, 2006
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* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
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*/
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#include <linux/types.h>
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#include <linux/export.h>
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#include <linux/spinlock.h>
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#include <linux/jiffies.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/percpu.h>
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#include <asm/alternative.h>
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#include <asm/io.h>
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int spin_retry = -1;
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static int __init spin_retry_init(void)
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{
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if (spin_retry < 0)
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spin_retry = 1000;
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return 0;
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}
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early_initcall(spin_retry_init);
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/*
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* spin_retry= parameter
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*/
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static int __init spin_retry_setup(char *str)
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{
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spin_retry = simple_strtoul(str, &str, 0);
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return 1;
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}
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__setup("spin_retry=", spin_retry_setup);
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struct spin_wait {
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struct spin_wait *next, *prev;
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int node_id;
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} __aligned(32);
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static DEFINE_PER_CPU_ALIGNED(struct spin_wait, spin_wait[4]);
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#define _Q_LOCK_CPU_OFFSET 0
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#define _Q_LOCK_STEAL_OFFSET 16
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#define _Q_TAIL_IDX_OFFSET 18
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#define _Q_TAIL_CPU_OFFSET 20
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#define _Q_LOCK_CPU_MASK 0x0000ffff
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#define _Q_LOCK_STEAL_ADD 0x00010000
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#define _Q_LOCK_STEAL_MASK 0x00030000
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#define _Q_TAIL_IDX_MASK 0x000c0000
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#define _Q_TAIL_CPU_MASK 0xfff00000
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#define _Q_LOCK_MASK (_Q_LOCK_CPU_MASK | _Q_LOCK_STEAL_MASK)
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#define _Q_TAIL_MASK (_Q_TAIL_IDX_MASK | _Q_TAIL_CPU_MASK)
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void arch_spin_lock_setup(int cpu)
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{
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struct spin_wait *node;
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int ix;
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node = per_cpu_ptr(&spin_wait[0], cpu);
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for (ix = 0; ix < 4; ix++, node++) {
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memset(node, 0, sizeof(*node));
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node->node_id = ((cpu + 1) << _Q_TAIL_CPU_OFFSET) +
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(ix << _Q_TAIL_IDX_OFFSET);
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}
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}
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static inline int arch_load_niai4(int *lock)
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{
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int owner;
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asm_inline volatile(
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ALTERNATIVE("", ".long 0xb2fa0040", 49) /* NIAI 4 */
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" l %0,%1\n"
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: "=d" (owner) : "Q" (*lock) : "memory");
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return owner;
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}
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static inline int arch_cmpxchg_niai8(int *lock, int old, int new)
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{
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int expected = old;
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asm_inline volatile(
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ALTERNATIVE("", ".long 0xb2fa0080", 49) /* NIAI 8 */
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" cs %0,%3,%1\n"
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: "=d" (old), "=Q" (*lock)
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: "0" (old), "d" (new), "Q" (*lock)
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: "cc", "memory");
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return expected == old;
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}
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static inline struct spin_wait *arch_spin_decode_tail(int lock)
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{
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int ix, cpu;
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ix = (lock & _Q_TAIL_IDX_MASK) >> _Q_TAIL_IDX_OFFSET;
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cpu = (lock & _Q_TAIL_CPU_MASK) >> _Q_TAIL_CPU_OFFSET;
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return per_cpu_ptr(&spin_wait[ix], cpu - 1);
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}
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static inline int arch_spin_yield_target(int lock, struct spin_wait *node)
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{
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if (lock & _Q_LOCK_CPU_MASK)
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return lock & _Q_LOCK_CPU_MASK;
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if (node == NULL || node->prev == NULL)
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return 0; /* 0 -> no target cpu */
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while (node->prev)
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node = node->prev;
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return node->node_id >> _Q_TAIL_CPU_OFFSET;
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}
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static inline void arch_spin_lock_queued(arch_spinlock_t *lp)
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{
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struct spin_wait *node, *next;
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int lockval, ix, node_id, tail_id, old, new, owner, count;
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ix = S390_lowcore.spinlock_index++;
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barrier();
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lockval = SPINLOCK_LOCKVAL; /* cpu + 1 */
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node = this_cpu_ptr(&spin_wait[ix]);
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node->prev = node->next = NULL;
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node_id = node->node_id;
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/* Enqueue the node for this CPU in the spinlock wait queue */
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while (1) {
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old = READ_ONCE(lp->lock);
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if ((old & _Q_LOCK_CPU_MASK) == 0 &&
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(old & _Q_LOCK_STEAL_MASK) != _Q_LOCK_STEAL_MASK) {
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/*
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* The lock is free but there may be waiters.
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* With no waiters simply take the lock, if there
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* are waiters try to steal the lock. The lock may
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* be stolen three times before the next queued
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* waiter will get the lock.
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*/
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new = (old ? (old + _Q_LOCK_STEAL_ADD) : 0) | lockval;
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if (__atomic_cmpxchg_bool(&lp->lock, old, new))
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/* Got the lock */
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goto out;
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/* lock passing in progress */
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continue;
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}
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/* Make the node of this CPU the new tail. */
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new = node_id | (old & _Q_LOCK_MASK);
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if (__atomic_cmpxchg_bool(&lp->lock, old, new))
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break;
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}
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/* Set the 'next' pointer of the tail node in the queue */
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tail_id = old & _Q_TAIL_MASK;
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if (tail_id != 0) {
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node->prev = arch_spin_decode_tail(tail_id);
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WRITE_ONCE(node->prev->next, node);
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}
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/* Pass the virtual CPU to the lock holder if it is not running */
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owner = arch_spin_yield_target(old, node);
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if (owner && arch_vcpu_is_preempted(owner - 1))
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smp_yield_cpu(owner - 1);
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/* Spin on the CPU local node->prev pointer */
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if (tail_id != 0) {
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count = spin_retry;
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while (READ_ONCE(node->prev) != NULL) {
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if (count-- >= 0)
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continue;
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count = spin_retry;
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/* Query running state of lock holder again. */
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owner = arch_spin_yield_target(old, node);
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if (owner && arch_vcpu_is_preempted(owner - 1))
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smp_yield_cpu(owner - 1);
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}
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}
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/* Spin on the lock value in the spinlock_t */
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count = spin_retry;
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while (1) {
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old = READ_ONCE(lp->lock);
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owner = old & _Q_LOCK_CPU_MASK;
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if (!owner) {
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tail_id = old & _Q_TAIL_MASK;
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new = ((tail_id != node_id) ? tail_id : 0) | lockval;
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if (__atomic_cmpxchg_bool(&lp->lock, old, new))
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/* Got the lock */
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break;
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continue;
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}
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if (count-- >= 0)
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continue;
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count = spin_retry;
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if (!MACHINE_IS_LPAR || arch_vcpu_is_preempted(owner - 1))
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smp_yield_cpu(owner - 1);
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}
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/* Pass lock_spin job to next CPU in the queue */
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if (node_id && tail_id != node_id) {
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/* Wait until the next CPU has set up the 'next' pointer */
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while ((next = READ_ONCE(node->next)) == NULL)
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;
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next->prev = NULL;
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}
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out:
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S390_lowcore.spinlock_index--;
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}
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static inline void arch_spin_lock_classic(arch_spinlock_t *lp)
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{
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int lockval, old, new, owner, count;
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lockval = SPINLOCK_LOCKVAL; /* cpu + 1 */
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/* Pass the virtual CPU to the lock holder if it is not running */
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owner = arch_spin_yield_target(READ_ONCE(lp->lock), NULL);
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if (owner && arch_vcpu_is_preempted(owner - 1))
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smp_yield_cpu(owner - 1);
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count = spin_retry;
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while (1) {
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old = arch_load_niai4(&lp->lock);
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owner = old & _Q_LOCK_CPU_MASK;
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/* Try to get the lock if it is free. */
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if (!owner) {
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new = (old & _Q_TAIL_MASK) | lockval;
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if (arch_cmpxchg_niai8(&lp->lock, old, new)) {
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/* Got the lock */
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return;
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}
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continue;
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}
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if (count-- >= 0)
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continue;
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count = spin_retry;
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if (!MACHINE_IS_LPAR || arch_vcpu_is_preempted(owner - 1))
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smp_yield_cpu(owner - 1);
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}
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}
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void arch_spin_lock_wait(arch_spinlock_t *lp)
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{
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if (test_cpu_flag(CIF_DEDICATED_CPU))
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arch_spin_lock_queued(lp);
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else
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arch_spin_lock_classic(lp);
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}
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EXPORT_SYMBOL(arch_spin_lock_wait);
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int arch_spin_trylock_retry(arch_spinlock_t *lp)
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{
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int cpu = SPINLOCK_LOCKVAL;
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int owner, count;
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for (count = spin_retry; count > 0; count--) {
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owner = READ_ONCE(lp->lock);
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/* Try to get the lock if it is free. */
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if (!owner) {
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if (__atomic_cmpxchg_bool(&lp->lock, 0, cpu))
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return 1;
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}
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}
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return 0;
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}
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EXPORT_SYMBOL(arch_spin_trylock_retry);
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void arch_read_lock_wait(arch_rwlock_t *rw)
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{
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if (unlikely(in_interrupt())) {
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while (READ_ONCE(rw->cnts) & 0x10000)
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barrier();
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return;
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}
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/* Remove this reader again to allow recursive read locking */
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__atomic_add_const(-1, &rw->cnts);
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/* Put the reader into the wait queue */
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arch_spin_lock(&rw->wait);
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/* Now add this reader to the count value again */
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__atomic_add_const(1, &rw->cnts);
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/* Loop until the writer is done */
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while (READ_ONCE(rw->cnts) & 0x10000)
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barrier();
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arch_spin_unlock(&rw->wait);
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}
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EXPORT_SYMBOL(arch_read_lock_wait);
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void arch_write_lock_wait(arch_rwlock_t *rw)
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{
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int old;
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/* Add this CPU to the write waiters */
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__atomic_add(0x20000, &rw->cnts);
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/* Put the writer into the wait queue */
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arch_spin_lock(&rw->wait);
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while (1) {
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old = READ_ONCE(rw->cnts);
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if ((old & 0x1ffff) == 0 &&
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__atomic_cmpxchg_bool(&rw->cnts, old, old | 0x10000))
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/* Got the lock */
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break;
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barrier();
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}
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arch_spin_unlock(&rw->wait);
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}
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EXPORT_SYMBOL(arch_write_lock_wait);
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void arch_spin_relax(arch_spinlock_t *lp)
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{
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int cpu;
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cpu = READ_ONCE(lp->lock) & _Q_LOCK_CPU_MASK;
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if (!cpu)
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return;
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if (MACHINE_IS_LPAR && !arch_vcpu_is_preempted(cpu - 1))
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return;
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smp_yield_cpu(cpu - 1);
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}
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EXPORT_SYMBOL(arch_spin_relax);
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