193 lines
6.0 KiB
C
193 lines
6.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Support code for Analog Devices Sigma-Delta ADCs
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*
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* Copyright 2012 Analog Devices Inc.
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* Author: Lars-Peter Clausen <lars@metafoo.de>
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*/
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#ifndef __AD_SIGMA_DELTA_H__
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#define __AD_SIGMA_DELTA_H__
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enum ad_sigma_delta_mode {
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AD_SD_MODE_CONTINUOUS = 0,
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AD_SD_MODE_SINGLE = 1,
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AD_SD_MODE_IDLE = 2,
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AD_SD_MODE_POWERDOWN = 3,
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};
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/**
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* struct ad_sigma_delta_calib_data - Calibration data for Sigma Delta devices
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* @mode: Calibration mode.
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* @channel: Calibration channel.
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*/
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struct ad_sd_calib_data {
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unsigned int mode;
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unsigned int channel;
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};
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struct ad_sigma_delta;
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struct iio_dev;
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/**
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* struct ad_sigma_delta_info - Sigma Delta driver specific callbacks and options
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* @set_channel: Will be called to select the current channel, may be NULL.
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* @set_mode: Will be called to select the current mode, may be NULL.
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* @postprocess_sample: Is called for each sampled data word, can be used to
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* modify or drop the sample data, it, may be NULL.
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* @has_registers: true if the device has writable and readable registers, false
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* if there is just one read-only sample data shift register.
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* @addr_shift: Shift of the register address in the communications register.
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* @read_mask: Mask for the communications register having the read bit set.
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* @data_reg: Address of the data register, if 0 the default address of 0x3 will
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* be used.
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*/
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struct ad_sigma_delta_info {
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int (*set_channel)(struct ad_sigma_delta *, unsigned int channel);
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int (*set_mode)(struct ad_sigma_delta *, enum ad_sigma_delta_mode mode);
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int (*postprocess_sample)(struct ad_sigma_delta *, unsigned int raw_sample);
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bool has_registers;
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unsigned int addr_shift;
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unsigned int read_mask;
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unsigned int data_reg;
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};
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/**
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* struct ad_sigma_delta - Sigma Delta device struct
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* @spi: The spi device associated with the Sigma Delta device.
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* @trig: The IIO trigger associated with the Sigma Delta device.
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*
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* Most of the fields are private to the sigma delta library code and should not
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* be accessed by individual drivers.
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*/
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struct ad_sigma_delta {
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struct spi_device *spi;
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struct iio_trigger *trig;
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/* private: */
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struct completion completion;
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bool irq_dis;
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bool bus_locked;
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bool keep_cs_asserted;
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uint8_t comm;
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const struct ad_sigma_delta_info *info;
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/*
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* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache lines.
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*/
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uint8_t data[4] ____cacheline_aligned;
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};
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static inline int ad_sigma_delta_set_channel(struct ad_sigma_delta *sd,
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unsigned int channel)
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{
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if (sd->info->set_channel)
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return sd->info->set_channel(sd, channel);
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return 0;
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}
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static inline int ad_sigma_delta_set_mode(struct ad_sigma_delta *sd,
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unsigned int mode)
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{
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if (sd->info->set_mode)
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return sd->info->set_mode(sd, mode);
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return 0;
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}
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static inline int ad_sigma_delta_postprocess_sample(struct ad_sigma_delta *sd,
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unsigned int raw_sample)
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{
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if (sd->info->postprocess_sample)
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return sd->info->postprocess_sample(sd, raw_sample);
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return 0;
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}
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void ad_sd_set_comm(struct ad_sigma_delta *sigma_delta, uint8_t comm);
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int ad_sd_write_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg,
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unsigned int size, unsigned int val);
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int ad_sd_read_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg,
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unsigned int size, unsigned int *val);
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int ad_sd_reset(struct ad_sigma_delta *sigma_delta,
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unsigned int reset_length);
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int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, int *val);
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int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta,
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unsigned int mode, unsigned int channel);
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int ad_sd_calibrate_all(struct ad_sigma_delta *sigma_delta,
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const struct ad_sd_calib_data *cd, unsigned int n);
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int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev,
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struct spi_device *spi, const struct ad_sigma_delta_info *info);
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int ad_sd_setup_buffer_and_trigger(struct iio_dev *indio_dev);
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void ad_sd_cleanup_buffer_and_trigger(struct iio_dev *indio_dev);
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int ad_sd_validate_trigger(struct iio_dev *indio_dev, struct iio_trigger *trig);
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#define __AD_SD_CHANNEL(_si, _channel1, _channel2, _address, _bits, \
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_storagebits, _shift, _extend_name, _type, _mask_all) \
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{ \
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.type = (_type), \
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.differential = (_channel2 == -1 ? 0 : 1), \
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.indexed = 1, \
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.channel = (_channel1), \
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.channel2 = (_channel2), \
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.address = (_address), \
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.extend_name = (_extend_name), \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_OFFSET), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
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.info_mask_shared_by_all = _mask_all, \
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.scan_index = (_si), \
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.scan_type = { \
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.sign = 'u', \
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.realbits = (_bits), \
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.storagebits = (_storagebits), \
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.shift = (_shift), \
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.endianness = IIO_BE, \
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}, \
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}
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#define AD_SD_DIFF_CHANNEL(_si, _channel1, _channel2, _address, _bits, \
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_storagebits, _shift) \
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__AD_SD_CHANNEL(_si, _channel1, _channel2, _address, _bits, \
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_storagebits, _shift, NULL, IIO_VOLTAGE, \
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BIT(IIO_CHAN_INFO_SAMP_FREQ))
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#define AD_SD_SHORTED_CHANNEL(_si, _channel, _address, _bits, \
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_storagebits, _shift) \
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__AD_SD_CHANNEL(_si, _channel, _channel, _address, _bits, \
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_storagebits, _shift, "shorted", IIO_VOLTAGE, \
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BIT(IIO_CHAN_INFO_SAMP_FREQ))
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#define AD_SD_CHANNEL(_si, _channel, _address, _bits, \
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_storagebits, _shift) \
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__AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \
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_storagebits, _shift, NULL, IIO_VOLTAGE, \
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BIT(IIO_CHAN_INFO_SAMP_FREQ))
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#define AD_SD_CHANNEL_NO_SAMP_FREQ(_si, _channel, _address, _bits, \
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_storagebits, _shift) \
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__AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \
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_storagebits, _shift, NULL, IIO_VOLTAGE, 0)
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#define AD_SD_TEMP_CHANNEL(_si, _address, _bits, _storagebits, _shift) \
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__AD_SD_CHANNEL(_si, 0, -1, _address, _bits, \
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_storagebits, _shift, NULL, IIO_TEMP, \
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BIT(IIO_CHAN_INFO_SAMP_FREQ))
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#define AD_SD_SUPPLY_CHANNEL(_si, _channel, _address, _bits, _storagebits, \
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_shift) \
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__AD_SD_CHANNEL(_si, _channel, -1, _address, _bits, \
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_storagebits, _shift, "supply", IIO_VOLTAGE, \
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BIT(IIO_CHAN_INFO_SAMP_FREQ))
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#endif
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