399 lines
13 KiB
C
399 lines
13 KiB
C
/*
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* drivers/net/ethernet/mellanox/mlxsw/core.h
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* Copyright (c) 2015 Mellanox Technologies. All rights reserved.
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* Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
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* Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
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* Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the names of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _MLXSW_CORE_H
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#define _MLXSW_CORE_H
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/slab.h>
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#include <linux/gfp.h>
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#include <linux/types.h>
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#include <linux/skbuff.h>
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#include <linux/workqueue.h>
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#include <net/devlink.h>
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#include "trap.h"
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#include "reg.h"
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#include "cmd.h"
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#include "resources.h"
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struct mlxsw_core;
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struct mlxsw_core_port;
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struct mlxsw_driver;
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struct mlxsw_bus;
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struct mlxsw_bus_info;
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void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core);
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int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver);
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void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver);
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int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
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const struct mlxsw_bus *mlxsw_bus,
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void *bus_priv);
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void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core);
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struct mlxsw_tx_info {
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u8 local_port;
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bool is_emad;
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};
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bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_tx_info *tx_info);
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int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
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const struct mlxsw_tx_info *tx_info);
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struct mlxsw_rx_listener {
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void (*func)(struct sk_buff *skb, u8 local_port, void *priv);
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u8 local_port;
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u16 trap_id;
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enum mlxsw_reg_hpkt_action action;
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};
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struct mlxsw_event_listener {
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void (*func)(const struct mlxsw_reg_info *reg,
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char *payload, void *priv);
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enum mlxsw_event_trap_id trap_id;
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};
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struct mlxsw_listener {
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u16 trap_id;
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union {
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struct mlxsw_rx_listener rx_listener;
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struct mlxsw_event_listener event_listener;
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} u;
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enum mlxsw_reg_hpkt_action action;
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enum mlxsw_reg_hpkt_action unreg_action;
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u8 trap_group;
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bool is_ctrl; /* should go via control buffer or not */
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bool is_event;
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};
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#define MLXSW_RXL(_func, _trap_id, _action, _is_ctrl, _unreg_action) \
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{ \
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.trap_id = MLXSW_TRAP_ID_##_trap_id, \
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.u.rx_listener = \
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{ \
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.func = _func, \
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.local_port = MLXSW_PORT_DONT_CARE, \
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.trap_id = MLXSW_TRAP_ID_##_trap_id, \
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}, \
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.action = MLXSW_REG_HPKT_ACTION_##_action, \
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.unreg_action = MLXSW_REG_HPKT_ACTION_##_unreg_action, \
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.trap_group = MLXSW_REG_HTGT_TRAP_GROUP_RX, \
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.is_ctrl = _is_ctrl, \
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.is_event = false, \
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}
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#define MLXSW_EVENTL(_func, _trap_id) \
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{ \
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.trap_id = MLXSW_TRAP_ID_##_trap_id, \
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.u.event_listener = \
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{ \
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.func = _func, \
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.trap_id = MLXSW_TRAP_ID_##_trap_id, \
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}, \
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.action = MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU, \
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.trap_group = MLXSW_REG_HTGT_TRAP_GROUP_EMAD, \
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.is_ctrl = false, \
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.is_event = true, \
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}
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int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_rx_listener *rxl,
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void *priv);
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void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_rx_listener *rxl,
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void *priv);
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int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_event_listener *el,
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void *priv);
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void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_event_listener *el,
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void *priv);
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int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_listener *listener,
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void *priv);
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void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_listener *listener,
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void *priv);
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typedef void mlxsw_reg_trans_cb_t(struct mlxsw_core *mlxsw_core, char *payload,
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size_t payload_len, unsigned long cb_priv);
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int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_reg_info *reg, char *payload,
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struct list_head *bulk_list,
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mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
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int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_reg_info *reg, char *payload,
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struct list_head *bulk_list,
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mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
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int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list);
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int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_reg_info *reg, char *payload);
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int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_reg_info *reg, char *payload);
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struct mlxsw_rx_info {
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bool is_lag;
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union {
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u16 sys_port;
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u16 lag_id;
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} u;
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u8 lag_port_index;
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int trap_id;
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};
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void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
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struct mlxsw_rx_info *rx_info);
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void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
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u16 lag_id, u8 port_index, u8 local_port);
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u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
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u16 lag_id, u8 port_index);
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void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
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u16 lag_id, u8 local_port);
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void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port);
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int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port);
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void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port);
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void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
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void *port_driver_priv, struct net_device *dev,
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bool split, u32 split_group);
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void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
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void *port_driver_priv);
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void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
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void *port_driver_priv);
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enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
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u8 local_port);
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int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay);
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#define MLXSW_CONFIG_PROFILE_SWID_COUNT 8
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struct mlxsw_swid_config {
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u8 used_type:1,
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used_properties:1;
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u8 type;
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u8 properties;
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};
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struct mlxsw_config_profile {
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u16 used_max_vepa_channels:1,
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used_max_mid:1,
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used_max_pgt:1,
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used_max_system_port:1,
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used_max_vlan_groups:1,
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used_max_regions:1,
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used_flood_tables:1,
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used_flood_mode:1,
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used_max_ib_mc:1,
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used_max_pkey:1,
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used_ar_sec:1,
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used_adaptive_routing_group_cap:1,
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used_kvd_split_data:1; /* indicate for the kvd's values */
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u8 max_vepa_channels;
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u16 max_mid;
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u16 max_pgt;
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u16 max_system_port;
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u16 max_vlan_groups;
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u16 max_regions;
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u8 max_flood_tables;
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u8 max_vid_flood_tables;
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u8 flood_mode;
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u8 max_fid_offset_flood_tables;
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u16 fid_offset_flood_table_size;
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u8 max_fid_flood_tables;
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u16 fid_flood_table_size;
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u16 max_ib_mc;
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u16 max_pkey;
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u8 ar_sec;
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u16 adaptive_routing_group_cap;
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u8 arn;
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u32 kvd_linear_size;
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u16 kvd_hash_granularity;
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u8 kvd_hash_single_parts;
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u8 kvd_hash_double_parts;
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u8 resource_query_enable;
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struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];
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};
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struct mlxsw_driver {
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struct list_head list;
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const char *kind;
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size_t priv_size;
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int (*init)(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_bus_info *mlxsw_bus_info);
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void (*fini)(struct mlxsw_core *mlxsw_core);
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int (*port_type_set)(struct mlxsw_core *mlxsw_core, u8 local_port,
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enum devlink_port_type new_type);
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int (*port_split)(struct mlxsw_core *mlxsw_core, u8 local_port,
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unsigned int count);
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int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u8 local_port);
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int (*sb_pool_get)(struct mlxsw_core *mlxsw_core,
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unsigned int sb_index, u16 pool_index,
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struct devlink_sb_pool_info *pool_info);
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int (*sb_pool_set)(struct mlxsw_core *mlxsw_core,
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unsigned int sb_index, u16 pool_index, u32 size,
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enum devlink_sb_threshold_type threshold_type);
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int (*sb_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
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unsigned int sb_index, u16 pool_index,
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u32 *p_threshold);
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int (*sb_port_pool_set)(struct mlxsw_core_port *mlxsw_core_port,
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unsigned int sb_index, u16 pool_index,
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u32 threshold);
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int (*sb_tc_pool_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
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unsigned int sb_index, u16 tc_index,
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enum devlink_sb_pool_type pool_type,
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u16 *p_pool_index, u32 *p_threshold);
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int (*sb_tc_pool_bind_set)(struct mlxsw_core_port *mlxsw_core_port,
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unsigned int sb_index, u16 tc_index,
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enum devlink_sb_pool_type pool_type,
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u16 pool_index, u32 threshold);
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int (*sb_occ_snapshot)(struct mlxsw_core *mlxsw_core,
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unsigned int sb_index);
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int (*sb_occ_max_clear)(struct mlxsw_core *mlxsw_core,
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unsigned int sb_index);
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int (*sb_occ_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
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unsigned int sb_index, u16 pool_index,
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u32 *p_cur, u32 *p_max);
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int (*sb_occ_tc_port_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
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unsigned int sb_index, u16 tc_index,
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enum devlink_sb_pool_type pool_type,
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u32 *p_cur, u32 *p_max);
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void (*txhdr_construct)(struct sk_buff *skb,
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const struct mlxsw_tx_info *tx_info);
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u8 txhdr_len;
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const struct mlxsw_config_profile *profile;
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};
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bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
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enum mlxsw_res_id res_id);
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#define MLXSW_CORE_RES_VALID(res, short_res_id) \
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mlxsw_core_res_valid(res, MLXSW_RES_ID_##short_res_id)
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u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
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enum mlxsw_res_id res_id);
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#define MLXSW_CORE_RES_GET(res, short_res_id) \
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mlxsw_core_res_get(res, MLXSW_RES_ID_##short_res_id)
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#define MLXSW_BUS_F_TXRX BIT(0)
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struct mlxsw_bus {
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const char *kind;
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int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core,
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const struct mlxsw_config_profile *profile,
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struct mlxsw_res *res);
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void (*fini)(void *bus_priv);
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bool (*skb_transmit_busy)(void *bus_priv,
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const struct mlxsw_tx_info *tx_info);
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int (*skb_transmit)(void *bus_priv, struct sk_buff *skb,
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const struct mlxsw_tx_info *tx_info);
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int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod,
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u32 in_mod, bool out_mbox_direct,
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char *in_mbox, size_t in_mbox_size,
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char *out_mbox, size_t out_mbox_size,
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u8 *p_status);
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u8 features;
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};
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struct mlxsw_bus_info {
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const char *device_kind;
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const char *device_name;
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struct device *dev;
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struct {
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u16 major;
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u16 minor;
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u16 subminor;
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} fw_rev;
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u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN];
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u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN];
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};
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struct mlxsw_hwmon;
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#ifdef CONFIG_MLXSW_CORE_HWMON
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int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_bus_info *mlxsw_bus_info,
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struct mlxsw_hwmon **p_hwmon);
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void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon);
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#else
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static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_bus_info *mlxsw_bus_info,
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struct mlxsw_hwmon **p_hwmon)
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{
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return 0;
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}
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#endif
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struct mlxsw_thermal;
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#ifdef CONFIG_MLXSW_CORE_THERMAL
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int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_bus_info *mlxsw_bus_info,
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struct mlxsw_thermal **p_thermal);
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void mlxsw_thermal_fini(struct mlxsw_thermal *thermal);
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#else
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static inline int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_bus_info *mlxsw_bus_info,
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struct mlxsw_thermal **p_thermal)
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{
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return 0;
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}
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static inline void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)
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{
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}
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#endif
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#endif
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