258 lines
6.4 KiB
C
258 lines
6.4 KiB
C
/* linux/drivers/mmc/host/sdhci-pxa.c
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*
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* Copyright (C) 2010 Marvell International Ltd.
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* Zhangfei Gao <zhangfei.gao@marvell.com>
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* Kevin Wang <dwang4@marvell.com>
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* Mingwei Wang <mwwang@marvell.com>
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* Philip Rakity <prakity@marvell.com>
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* Mark Brown <markb@marvell.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* Supports:
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* SDHCI support for MMP2/PXA910/PXA168
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*
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* Refer to sdhci-s3c.c.
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*/
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/mmc/host.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <plat/sdhci.h>
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#include "sdhci.h"
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#define DRIVER_NAME "sdhci-pxa"
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#define SD_FIFO_PARAM 0x104
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#define DIS_PAD_SD_CLK_GATE 0x400
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struct sdhci_pxa {
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struct sdhci_host *host;
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struct sdhci_pxa_platdata *pdata;
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struct clk *clk;
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struct resource *res;
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u8 clk_enable;
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};
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/*****************************************************************************\
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* *
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* SDHCI core callbacks *
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* *
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\*****************************************************************************/
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static void set_clock(struct sdhci_host *host, unsigned int clock)
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{
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struct sdhci_pxa *pxa = sdhci_priv(host);
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u32 tmp = 0;
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if (clock == 0) {
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if (pxa->clk_enable) {
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clk_disable(pxa->clk);
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pxa->clk_enable = 0;
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}
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} else {
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if (0 == pxa->clk_enable) {
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if (pxa->pdata->flags & PXA_FLAG_DISABLE_CLOCK_GATING) {
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tmp = readl(host->ioaddr + SD_FIFO_PARAM);
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tmp |= DIS_PAD_SD_CLK_GATE;
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writel(tmp, host->ioaddr + SD_FIFO_PARAM);
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}
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clk_enable(pxa->clk);
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pxa->clk_enable = 1;
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}
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}
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}
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static struct sdhci_ops sdhci_pxa_ops = {
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.set_clock = set_clock,
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};
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/*****************************************************************************\
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* *
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* Device probing/removal *
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* *
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\*****************************************************************************/
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static int __devinit sdhci_pxa_probe(struct platform_device *pdev)
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{
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struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data;
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struct device *dev = &pdev->dev;
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struct sdhci_host *host = NULL;
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struct resource *iomem = NULL;
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struct sdhci_pxa *pxa = NULL;
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int ret, irq;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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dev_err(dev, "no irq specified\n");
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return irq;
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}
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iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!iomem) {
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dev_err(dev, "no memory specified\n");
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return -ENOENT;
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}
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host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pxa));
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if (IS_ERR(host)) {
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dev_err(dev, "failed to alloc host\n");
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return PTR_ERR(host);
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}
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pxa = sdhci_priv(host);
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pxa->host = host;
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pxa->pdata = pdata;
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pxa->clk_enable = 0;
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pxa->clk = clk_get(dev, "PXA-SDHCLK");
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if (IS_ERR(pxa->clk)) {
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dev_err(dev, "failed to get io clock\n");
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ret = PTR_ERR(pxa->clk);
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goto out;
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}
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pxa->res = request_mem_region(iomem->start, resource_size(iomem),
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mmc_hostname(host->mmc));
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if (!pxa->res) {
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dev_err(&pdev->dev, "cannot request region\n");
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ret = -EBUSY;
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goto out;
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}
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host->ioaddr = ioremap(iomem->start, resource_size(iomem));
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if (!host->ioaddr) {
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dev_err(&pdev->dev, "failed to remap registers\n");
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ret = -ENOMEM;
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goto out;
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}
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host->hw_name = "MMC";
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host->ops = &sdhci_pxa_ops;
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host->irq = irq;
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host->quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
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if (pdata->quirks)
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host->quirks |= pdata->quirks;
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/* If slot design supports 8 bit data, indicate this to MMC. */
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if (pdata->flags & PXA_FLAG_SD_8_BIT_CAPABLE_SLOT)
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host->mmc->caps |= MMC_CAP_8_BIT_DATA;
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ret = sdhci_add_host(host);
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if (ret) {
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dev_err(&pdev->dev, "failed to add host\n");
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goto out;
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}
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if (pxa->pdata->max_speed)
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host->mmc->f_max = pxa->pdata->max_speed;
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platform_set_drvdata(pdev, host);
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return 0;
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out:
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if (host) {
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clk_put(pxa->clk);
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if (host->ioaddr)
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iounmap(host->ioaddr);
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if (pxa->res)
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release_mem_region(pxa->res->start,
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resource_size(pxa->res));
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sdhci_free_host(host);
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}
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return ret;
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}
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static int __devexit sdhci_pxa_remove(struct platform_device *pdev)
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{
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struct sdhci_host *host = platform_get_drvdata(pdev);
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struct sdhci_pxa *pxa = sdhci_priv(host);
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int dead = 0;
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u32 scratch;
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if (host) {
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scratch = readl(host->ioaddr + SDHCI_INT_STATUS);
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if (scratch == (u32)-1)
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dead = 1;
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sdhci_remove_host(host, dead);
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if (host->ioaddr)
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iounmap(host->ioaddr);
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if (pxa->res)
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release_mem_region(pxa->res->start,
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resource_size(pxa->res));
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if (pxa->clk_enable) {
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clk_disable(pxa->clk);
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pxa->clk_enable = 0;
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}
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clk_put(pxa->clk);
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sdhci_free_host(host);
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platform_set_drvdata(pdev, NULL);
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}
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return 0;
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}
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#ifdef CONFIG_PM
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static int sdhci_pxa_suspend(struct platform_device *dev, pm_message_t state)
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{
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struct sdhci_host *host = platform_get_drvdata(dev);
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return sdhci_suspend_host(host, state);
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}
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static int sdhci_pxa_resume(struct platform_device *dev)
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{
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struct sdhci_host *host = platform_get_drvdata(dev);
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return sdhci_resume_host(host);
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}
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#else
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#define sdhci_pxa_suspend NULL
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#define sdhci_pxa_resume NULL
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#endif
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static struct platform_driver sdhci_pxa_driver = {
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.probe = sdhci_pxa_probe,
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.remove = __devexit_p(sdhci_pxa_remove),
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.suspend = sdhci_pxa_suspend,
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.resume = sdhci_pxa_resume,
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.driver = {
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.name = DRIVER_NAME,
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.owner = THIS_MODULE,
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},
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};
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/*****************************************************************************\
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* *
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* Driver init/exit *
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* *
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\*****************************************************************************/
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static int __init sdhci_pxa_init(void)
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{
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return platform_driver_register(&sdhci_pxa_driver);
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}
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static void __exit sdhci_pxa_exit(void)
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{
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platform_driver_unregister(&sdhci_pxa_driver);
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}
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module_init(sdhci_pxa_init);
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module_exit(sdhci_pxa_exit);
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MODULE_DESCRIPTION("SDH controller driver for PXA168/PXA910/MMP2");
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MODULE_AUTHOR("Zhangfei Gao <zhangfei.gao@marvell.com>");
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MODULE_LICENSE("GPL v2");
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