124 lines
2.9 KiB
C
124 lines
2.9 KiB
C
/*
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* Device Tree support for Allwinner A1X SoCs
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*
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* Copyright (C) 2012 Maxime Ripard
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/clocksource.h>
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/irqchip.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/io.h>
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#include <linux/clk/sunxi.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/system_misc.h>
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#include "sunxi.h"
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#define SUN4I_WATCHDOG_CTRL_REG 0x00
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#define SUN4I_WATCHDOG_CTRL_RESTART (1 << 0)
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#define SUN4I_WATCHDOG_MODE_REG 0x04
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#define SUN4I_WATCHDOG_MODE_ENABLE (1 << 0)
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#define SUN4I_WATCHDOG_MODE_RESET_ENABLE (1 << 1)
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static void __iomem *wdt_base;
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static void sun4i_restart(char mode, const char *cmd)
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{
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if (!wdt_base)
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return;
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/* Enable timer and set reset bit in the watchdog */
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writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
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wdt_base + SUN4I_WATCHDOG_MODE_REG);
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/*
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* Restart the watchdog. The default (and lowest) interval
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* value for the watchdog is 0.5s.
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*/
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writel(SUN4I_WATCHDOG_CTRL_RESTART, wdt_base + SUN4I_WATCHDOG_CTRL_REG);
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while (1) {
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mdelay(5);
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writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
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wdt_base + SUN4I_WATCHDOG_MODE_REG);
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}
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}
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static struct of_device_id sunxi_restart_ids[] = {
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{ .compatible = "allwinner,sun4i-wdt", .data = sun4i_restart },
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{ /*sentinel*/ }
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};
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static void sunxi_setup_restart(void)
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{
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const struct of_device_id *of_id;
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struct device_node *np;
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np = of_find_matching_node(NULL, sunxi_restart_ids);
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if (WARN(!np, "unable to setup watchdog restart"))
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return;
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wdt_base = of_iomap(np, 0);
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WARN(!wdt_base, "failed to map watchdog base address");
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of_id = of_match_node(sunxi_restart_ids, np);
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WARN(!of_id, "restart function not available");
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arm_pm_restart = of_id->data;
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}
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static struct map_desc sunxi_io_desc[] __initdata = {
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{
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.virtual = (unsigned long) SUNXI_REGS_VIRT_BASE,
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.pfn = __phys_to_pfn(SUNXI_REGS_PHYS_BASE),
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.length = SUNXI_REGS_SIZE,
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.type = MT_DEVICE,
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},
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};
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void __init sunxi_map_io(void)
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{
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iotable_init(sunxi_io_desc, ARRAY_SIZE(sunxi_io_desc));
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}
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static void __init sunxi_timer_init(void)
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{
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sunxi_init_clocks();
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clocksource_of_init();
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}
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static void __init sunxi_dt_init(void)
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{
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sunxi_setup_restart();
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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}
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static const char * const sunxi_board_dt_compat[] = {
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"allwinner,sun4i-a10",
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"allwinner,sun5i-a13",
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NULL,
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};
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DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
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.init_machine = sunxi_dt_init,
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.map_io = sunxi_map_io,
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.init_irq = irqchip_init,
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.init_time = sunxi_timer_init,
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.dt_compat = sunxi_board_dt_compat,
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MACHINE_END
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