James Zhu d0e62855fa drm/amdgpu: add uvd enc registers in header ... Add UVD encode write/read/size/base registers definition for uvd6.3 HEVC ecoding Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-and-Tested-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2017-10-06 17:43:53 -04:00
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drm	drm/amdgpu: add uvd enc registers in header	2017-10-06 17:43:53 -04:00
host1x	drm/tegra: Changes for v4.14-rc1	2017-08-21 17:37:33 +10:00
ipu-v3	drm: Convert to using %pOF instead of full_name	2017-07-26 13:45:06 +02:00
vga	sched/wait: Rename wait_queue_t => wait_queue_entry_t	2017-06-20 12:18:27 +02:00
Makefile	…