221 lines
5.4 KiB
C
221 lines
5.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Renesas R-Car USB2.0 clock selector
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*
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* Copyright (C) 2017 Renesas Electronics Corp.
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*
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* Based on renesas-cpg-mssr.c
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*
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* Copyright (C) 2015 Glider bvba
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/device.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/reset.h>
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#include <linux/slab.h>
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#define USB20_CLKSET0 0x00
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#define CLKSET0_INTCLK_EN BIT(11)
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#define CLKSET0_PRIVATE BIT(0)
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#define CLKSET0_EXTAL_ONLY (CLKSET0_INTCLK_EN | CLKSET0_PRIVATE)
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static const struct clk_bulk_data rcar_usb2_clocks[] = {
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{ .id = "ehci_ohci", },
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{ .id = "hs-usb-if", },
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};
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struct usb2_clock_sel_priv {
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void __iomem *base;
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struct clk_hw hw;
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struct clk_bulk_data clks[ARRAY_SIZE(rcar_usb2_clocks)];
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struct reset_control *rsts;
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bool extal;
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bool xtal;
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};
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#define to_priv(_hw) container_of(_hw, struct usb2_clock_sel_priv, hw)
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static void usb2_clock_sel_enable_extal_only(struct usb2_clock_sel_priv *priv)
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{
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u16 val = readw(priv->base + USB20_CLKSET0);
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pr_debug("%s: enter %d %d %x\n", __func__,
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priv->extal, priv->xtal, val);
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if (priv->extal && !priv->xtal && val != CLKSET0_EXTAL_ONLY)
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writew(CLKSET0_EXTAL_ONLY, priv->base + USB20_CLKSET0);
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}
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static void usb2_clock_sel_disable_extal_only(struct usb2_clock_sel_priv *priv)
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{
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if (priv->extal && !priv->xtal)
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writew(CLKSET0_PRIVATE, priv->base + USB20_CLKSET0);
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}
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static int usb2_clock_sel_enable(struct clk_hw *hw)
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{
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struct usb2_clock_sel_priv *priv = to_priv(hw);
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int ret;
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ret = reset_control_deassert(priv->rsts);
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if (ret)
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return ret;
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ret = clk_bulk_prepare_enable(ARRAY_SIZE(priv->clks), priv->clks);
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if (ret) {
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reset_control_assert(priv->rsts);
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return ret;
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}
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usb2_clock_sel_enable_extal_only(priv);
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return 0;
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}
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static void usb2_clock_sel_disable(struct clk_hw *hw)
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{
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struct usb2_clock_sel_priv *priv = to_priv(hw);
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usb2_clock_sel_disable_extal_only(priv);
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clk_bulk_disable_unprepare(ARRAY_SIZE(priv->clks), priv->clks);
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reset_control_assert(priv->rsts);
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}
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/*
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* This module seems a mux, but this driver assumes a gate because
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* ehci/ohci platform drivers don't support clk_set_parent() for now.
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* If this driver acts as a gate, ehci/ohci-platform drivers don't need
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* any modification.
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*/
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static const struct clk_ops usb2_clock_sel_clock_ops = {
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.enable = usb2_clock_sel_enable,
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.disable = usb2_clock_sel_disable,
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};
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static const struct of_device_id rcar_usb2_clock_sel_match[] = {
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{ .compatible = "renesas,rcar-gen3-usb2-clock-sel" },
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{ }
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};
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static int rcar_usb2_clock_sel_suspend(struct device *dev)
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{
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struct usb2_clock_sel_priv *priv = dev_get_drvdata(dev);
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usb2_clock_sel_disable_extal_only(priv);
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pm_runtime_put(dev);
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return 0;
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}
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static int rcar_usb2_clock_sel_resume(struct device *dev)
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{
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struct usb2_clock_sel_priv *priv = dev_get_drvdata(dev);
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pm_runtime_get_sync(dev);
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usb2_clock_sel_enable_extal_only(priv);
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return 0;
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}
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static int rcar_usb2_clock_sel_remove(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct usb2_clock_sel_priv *priv = platform_get_drvdata(pdev);
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of_clk_del_provider(dev->of_node);
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clk_hw_unregister(&priv->hw);
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pm_runtime_put(dev);
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pm_runtime_disable(dev);
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return 0;
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}
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static int rcar_usb2_clock_sel_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct usb2_clock_sel_priv *priv;
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struct clk *clk;
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struct clk_init_data init;
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int ret;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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memcpy(priv->clks, rcar_usb2_clocks, sizeof(priv->clks));
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ret = devm_clk_bulk_get(dev, ARRAY_SIZE(priv->clks), priv->clks);
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if (ret < 0)
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return ret;
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priv->rsts = devm_reset_control_array_get(dev, true, false);
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if (IS_ERR(priv->rsts))
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return PTR_ERR(priv->rsts);
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pm_runtime_enable(dev);
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pm_runtime_get_sync(dev);
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clk = devm_clk_get(dev, "usb_extal");
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if (!IS_ERR(clk) && !clk_prepare_enable(clk)) {
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priv->extal = !!clk_get_rate(clk);
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clk_disable_unprepare(clk);
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}
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clk = devm_clk_get(dev, "usb_xtal");
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if (!IS_ERR(clk) && !clk_prepare_enable(clk)) {
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priv->xtal = !!clk_get_rate(clk);
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clk_disable_unprepare(clk);
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}
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if (!priv->extal && !priv->xtal) {
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dev_err(dev, "This driver needs usb_extal or usb_xtal\n");
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return -ENOENT;
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}
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platform_set_drvdata(pdev, priv);
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dev_set_drvdata(dev, priv);
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init.name = "rcar_usb2_clock_sel";
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init.ops = &usb2_clock_sel_clock_ops;
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init.flags = 0;
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init.parent_names = NULL;
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init.num_parents = 0;
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priv->hw.init = &init;
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clk = clk_register(NULL, &priv->hw);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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return of_clk_add_hw_provider(np, of_clk_hw_simple_get, &priv->hw);
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}
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static const struct dev_pm_ops rcar_usb2_clock_sel_pm_ops = {
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.suspend = rcar_usb2_clock_sel_suspend,
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.resume = rcar_usb2_clock_sel_resume,
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};
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static struct platform_driver rcar_usb2_clock_sel_driver = {
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.driver = {
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.name = "rcar-usb2-clock-sel",
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.of_match_table = rcar_usb2_clock_sel_match,
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.pm = &rcar_usb2_clock_sel_pm_ops,
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},
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.probe = rcar_usb2_clock_sel_probe,
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.remove = rcar_usb2_clock_sel_remove,
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};
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builtin_platform_driver(rcar_usb2_clock_sel_driver);
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MODULE_DESCRIPTION("Renesas R-Car USB2 clock selector Driver");
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MODULE_LICENSE("GPL v2");
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