ce17ad0d54
The Memory_Info_Valid bit (CXL 3.0 8.1.3.8.2) indicates that the CXL
Range Size High and Size Low registers are valid. The bit must be set
within 1 second of reset deassertion to the device. Check valid bit
before we check the Memory_Active bit when waiting for
cxl_await_media_ready() to ensure that the memory info is valid for
consumption. Also ensures both DVSEC ranges 1 and 2 are ready if DVSEC
Capability indicates they are both supported.
Fixes:
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.. | ||
Makefile | ||
core.h | ||
hdm.c | ||
mbox.c | ||
memdev.c | ||
pci.c | ||
pmem.c | ||
port.c | ||
region.c | ||
regs.c | ||
suspend.c | ||
trace.c | ||
trace.h |