79b60ca83b
Currently IRQs are requested one by one. To balance spreading IRQs among cpus using such scheme requires remembering cpu mask for the cpus used for a given device. This complicates the IRQ allocation scheme in subsequent patch. Hence, prepare the code for bulk IRQs allocation. This enables spreading IRQs among cpus in subsequent patch. Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Parav Pandit <parav@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> |
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accel.h | ||
cq.h | ||
device.h | ||
doorbell.h | ||
driver.h | ||
eq.h | ||
eswitch.h | ||
fs.h | ||
fs_helpers.h | ||
mlx5_ifc.h | ||
mlx5_ifc_fpga.h | ||
mlx5_ifc_vdpa.h | ||
mpfs.h | ||
port.h | ||
qp.h | ||
rsc_dump.h | ||
transobj.h | ||
vport.h |