OpenCloudOS-Kernel/drivers/gpu
José Roberto de Souza cc8853f57e drm/i915: Add PSR2 selective update status registers and bits definitions
This register contains how many blocks was sent in the past selective
updates.
Those registers are not kept set all the times but polling it after flip
can show the values corresponding to the last 8 frames.

v2: Improved macros(Dhinakaran)

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190117205548.28378-3-jose.souza@intel.com
2019-01-22 16:33:12 -08:00
..
drm drm/i915: Add PSR2 selective update status registers and bits definitions 2019-01-22 16:33:12 -08:00
host1x gpu: host1x: Add Tegra194 support 2018-11-29 17:11:49 +01:00
ipu-v3 gpu: ipu-v3: image-convert: allow three rows or columns 2018-11-05 14:40:08 +01:00
vga drm-misc-next for v4.21, part 1: 2018-11-19 10:40:33 +10:00
Makefile