284 lines
6.9 KiB
C
284 lines
6.9 KiB
C
/*
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* KZM-ARM11-01 support
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* Copyright (C) 2009 Yoichi Yuasa <yuasa@linux-mips.org>
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*
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* based on code for MX31ADS,
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* Copyright (C) 2000 Deep Blue Solutions Ltd
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* Copyright (C) 2002 Shane Nay (shane@minirl.com)
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* Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <linux/smsc911x.h>
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#include <linux/types.h>
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#include <asm/irq.h>
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#include <asm/mach-types.h>
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#include <asm/memory.h>
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#include <asm/setup.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include <mach/clock.h>
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#include <mach/common.h>
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#include <mach/hardware.h>
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#include <mach/iomux-mx3.h>
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#include "devices-imx31.h"
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#define KZM_ARM11_IO_ADDRESS(x) (IOMEM( \
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IMX_IO_P2V_MODULE(x, MX31_CS4) ?: \
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IMX_IO_P2V_MODULE(x, MX31_CS5)) ?: \
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MX31_IO_ADDRESS(x))
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/*
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* KZM-ARM11-01 Board Control Registers on FPGA
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*/
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#define KZM_ARM11_CTL1 (MX31_CS4_BASE_ADDR + 0x1000)
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#define KZM_ARM11_CTL2 (MX31_CS4_BASE_ADDR + 0x1001)
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#define KZM_ARM11_RSW1 (MX31_CS4_BASE_ADDR + 0x1002)
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#define KZM_ARM11_BACK_LIGHT (MX31_CS4_BASE_ADDR + 0x1004)
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#define KZM_ARM11_FPGA_REV (MX31_CS4_BASE_ADDR + 0x1008)
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#define KZM_ARM11_7SEG_LED (MX31_CS4_BASE_ADDR + 0x1010)
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#define KZM_ARM11_LEDS (MX31_CS4_BASE_ADDR + 0x1020)
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#define KZM_ARM11_DIPSW2 (MX31_CS4_BASE_ADDR + 0x1003)
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/*
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* External UART for touch panel on FPGA
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*/
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#define KZM_ARM11_16550 (MX31_CS4_BASE_ADDR + 0x1050)
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#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
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/*
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* KZM-ARM11-01 has an external UART on FPGA
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*/
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static struct plat_serial8250_port serial_platform_data[] = {
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{
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.membase = KZM_ARM11_IO_ADDRESS(KZM_ARM11_16550),
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.mapbase = KZM_ARM11_16550,
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.irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
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.irqflags = IRQ_TYPE_EDGE_RISING,
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.uartclk = 14745600,
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.regshift = 0,
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.iotype = UPIO_MEM,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
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UPF_BUGGY_UART,
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},
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{},
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};
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static struct resource serial8250_resources[] = {
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{
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.start = KZM_ARM11_16550,
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.end = KZM_ARM11_16550 + 0x10,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
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.end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_1),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device serial_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = serial_platform_data,
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},
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.num_resources = ARRAY_SIZE(serial8250_resources),
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.resource = serial8250_resources,
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};
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static int __init kzm_init_ext_uart(void)
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{
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u8 tmp;
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/*
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* GPIO 1-1: external UART interrupt line
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*/
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mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO));
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gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "ext-uart-int");
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gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1));
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/*
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* Unmask UART interrupt
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*/
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tmp = __raw_readb(KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
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tmp |= 0x2;
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__raw_writeb(tmp, KZM_ARM11_IO_ADDRESS(KZM_ARM11_CTL1));
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return platform_device_register(&serial_device);
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}
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#else
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static inline int kzm_init_ext_uart(void)
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{
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return 0;
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}
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#endif
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/*
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* SMSC LAN9118
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*/
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#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
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static struct smsc911x_platform_config kzm_smsc9118_config = {
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.phy_interface = PHY_INTERFACE_MODE_MII,
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
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.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
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.flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
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};
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static struct resource kzm_smsc9118_resources[] = {
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{
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.start = MX31_CS5_BASE_ADDR,
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.end = MX31_CS5_BASE_ADDR + SZ_128K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_2),
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.end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_2),
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
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},
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};
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static struct platform_device kzm_smsc9118_device = {
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.name = "smsc911x",
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.id = -1,
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.num_resources = ARRAY_SIZE(kzm_smsc9118_resources),
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.resource = kzm_smsc9118_resources,
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.dev = {
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.platform_data = &kzm_smsc9118_config,
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},
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};
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static int __init kzm_init_smsc9118(void)
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{
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/*
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* GPIO 1-2: SMSC9118 interrupt line
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*/
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mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_2, IOMUX_CONFIG_GPIO));
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gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2), "smsc9118-int");
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gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_2));
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return platform_device_register(&kzm_smsc9118_device);
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}
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#else
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static inline int kzm_init_smsc9118(void)
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{
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return 0;
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}
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#endif
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#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
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static const struct imxuart_platform_data uart_pdata __initconst = {
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.flags = IMXUART_HAVE_RTSCTS,
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};
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static void __init kzm_init_imx_uart(void)
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{
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imx31_add_imx_uart0(&uart_pdata);
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imx31_add_imx_uart1(&uart_pdata);
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}
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#else
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static inline void kzm_init_imx_uart(void)
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{
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}
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#endif
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static int kzm_pins[] __initdata = {
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MX31_PIN_CTS1__CTS1,
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MX31_PIN_RTS1__RTS1,
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MX31_PIN_TXD1__TXD1,
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MX31_PIN_RXD1__RXD1,
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MX31_PIN_DCD_DCE1__DCD_DCE1,
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MX31_PIN_RI_DCE1__RI_DCE1,
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MX31_PIN_DSR_DCE1__DSR_DCE1,
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MX31_PIN_DTR_DCE1__DTR_DCE1,
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MX31_PIN_CTS2__CTS2,
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MX31_PIN_RTS2__RTS2,
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MX31_PIN_TXD2__TXD2,
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MX31_PIN_RXD2__RXD2,
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MX31_PIN_DCD_DTE1__DCD_DTE2,
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MX31_PIN_RI_DTE1__RI_DTE2,
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MX31_PIN_DSR_DTE1__DSR_DTE2,
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MX31_PIN_DTR_DTE1__DTR_DTE2,
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};
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/*
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* Board specific initialization.
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*/
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static void __init kzm_board_init(void)
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{
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imx31_soc_init();
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mxc_iomux_setup_multiple_pins(kzm_pins,
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ARRAY_SIZE(kzm_pins), "kzm");
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kzm_init_ext_uart();
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kzm_init_smsc9118();
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kzm_init_imx_uart();
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pr_info("Clock input source is 26MHz\n");
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}
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/*
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* This structure defines static mappings for the kzm-arm11-01 board.
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*/
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static struct map_desc kzm_io_desc[] __initdata = {
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{
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.virtual = MX31_CS4_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
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.length = MX31_CS4_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = MX31_CS5_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
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.length = MX31_CS5_SIZE,
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.type = MT_DEVICE
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},
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};
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/*
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* Set up static virtual mappings.
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*/
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static void __init kzm_map_io(void)
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{
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mx31_map_io();
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iotable_init(kzm_io_desc, ARRAY_SIZE(kzm_io_desc));
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}
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static void __init kzm_timer_init(void)
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{
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mx31_clocks_init(26000000);
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}
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static struct sys_timer kzm_timer = {
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.init = kzm_timer_init,
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};
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MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
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.atag_offset = 0x100,
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.map_io = kzm_map_io,
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.init_early = imx31_init_early,
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.init_irq = mx31_init_irq,
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.handle_irq = imx31_handle_irq,
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.timer = &kzm_timer,
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.init_machine = kzm_board_init,
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.restart = mxc_restart,
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MACHINE_END
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