120 lines
3.7 KiB
C
120 lines
3.7 KiB
C
/*
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* Copyright (C) 2015 Red Hat, Inc.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <drm/drmP.h>
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#include "virtgpu_drv.h"
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static const char *virtio_get_driver_name(struct dma_fence *f)
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{
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return "virtio_gpu";
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}
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static const char *virtio_get_timeline_name(struct dma_fence *f)
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{
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return "controlq";
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}
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static bool virtio_enable_signaling(struct dma_fence *f)
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{
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return true;
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}
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static bool virtio_signaled(struct dma_fence *f)
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{
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struct virtio_gpu_fence *fence = to_virtio_fence(f);
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if (atomic64_read(&fence->drv->last_seq) >= fence->seq)
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return true;
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return false;
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}
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static void virtio_fence_value_str(struct dma_fence *f, char *str, int size)
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{
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struct virtio_gpu_fence *fence = to_virtio_fence(f);
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snprintf(str, size, "%llu", fence->seq);
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}
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static void virtio_timeline_value_str(struct dma_fence *f, char *str, int size)
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{
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struct virtio_gpu_fence *fence = to_virtio_fence(f);
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snprintf(str, size, "%llu", (u64)atomic64_read(&fence->drv->last_seq));
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}
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static const struct dma_fence_ops virtio_fence_ops = {
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.get_driver_name = virtio_get_driver_name,
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.get_timeline_name = virtio_get_timeline_name,
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.enable_signaling = virtio_enable_signaling,
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.signaled = virtio_signaled,
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.wait = dma_fence_default_wait,
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.fence_value_str = virtio_fence_value_str,
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.timeline_value_str = virtio_timeline_value_str,
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};
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int virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
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struct virtio_gpu_ctrl_hdr *cmd_hdr,
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struct virtio_gpu_fence **fence)
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{
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struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
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unsigned long irq_flags;
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*fence = kmalloc(sizeof(struct virtio_gpu_fence), GFP_ATOMIC);
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if ((*fence) == NULL)
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return -ENOMEM;
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spin_lock_irqsave(&drv->lock, irq_flags);
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(*fence)->drv = drv;
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(*fence)->seq = ++drv->sync_seq;
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dma_fence_init(&(*fence)->f, &virtio_fence_ops, &drv->lock,
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drv->context, (*fence)->seq);
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dma_fence_get(&(*fence)->f);
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list_add_tail(&(*fence)->node, &drv->fences);
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spin_unlock_irqrestore(&drv->lock, irq_flags);
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cmd_hdr->flags |= cpu_to_le32(VIRTIO_GPU_FLAG_FENCE);
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cmd_hdr->fence_id = cpu_to_le64((*fence)->seq);
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return 0;
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}
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void virtio_gpu_fence_event_process(struct virtio_gpu_device *vgdev,
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u64 last_seq)
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{
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struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
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struct virtio_gpu_fence *fence, *tmp;
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unsigned long irq_flags;
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spin_lock_irqsave(&drv->lock, irq_flags);
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atomic64_set(&vgdev->fence_drv.last_seq, last_seq);
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list_for_each_entry_safe(fence, tmp, &drv->fences, node) {
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if (last_seq < fence->seq)
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continue;
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dma_fence_signal_locked(&fence->f);
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list_del(&fence->node);
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dma_fence_put(&fence->f);
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}
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spin_unlock_irqrestore(&drv->lock, irq_flags);
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}
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