Christophe Leroy d5f17ee964 powerpc/8xx: don't disable large TLBs with CONFIG_STRICT_KERNEL_RWX ... This patch implements handling of STRICT_KERNEL_RWX with large TLBs directly in the TLB miss handlers. To do so, etext and sinittext are aligned on 512kB boundaries and the miss handlers use 512kB pages instead of 8Mb pages for addresses close to the boundaries. It sets RO PP flags for addresses under sinittext. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>		2019-02-23 21:04:32 +11:00
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mmu-8xx.h	powerpc/8xx: don't disable large TLBs with CONFIG_STRICT_KERNEL_RWX	2019-02-23 21:04:32 +11:00
mmu-40x.h	powerpc/mm: move platform specific mmu-xxx.h in platform directories	2018-12-04 19:45:01 +11:00
mmu-44x.h	powerpc/44x: use patch_sites for TLB handlers patching	2018-12-19 18:56:32 +11:00
mmu.h	powerpc/mm: Extend pte_fragment functionality to PPC32	2018-12-04 19:45:01 +11:00
pgalloc.h	mm: treewide: remove unused address argument from pte_alloc functions	2019-01-04 13:13:47 -08:00
pgtable.h	powerpc/8xx: reintroduce 16K pages with HW assistance	2018-12-04 19:45:01 +11:00
pte-8xx.h	powerpc/8xx: Remove PTE_ATOMIC_UPDATES	2018-12-04 19:45:01 +11:00
pte-40x.h	powerpc: Typo s/use use/use/	2018-11-25 17:11:22 +11:00
pte-44x.h	powerpc/mm: Make pte_pgprot return all pte bits	2018-10-19 00:56:17 +11:00
pte-fsl-booke.h	powerpc/mm: Make pte_pgprot return all pte bits	2018-10-19 00:56:17 +11:00
slice.h	powerpc/8xx: Increase number of slices to 64	2018-03-06 09:21:24 +11:00