72 lines
1.9 KiB
Plaintext
72 lines
1.9 KiB
Plaintext
/*
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* Samsung's Exynos4412 SoC device tree source
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*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Samsung's Exynos4412 SoC device nodes are listed in this file. Exynos4412
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* based board files can include this file and provide values for board specfic
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* bindings.
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*
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* Note: This file does not include device nodes for all the controllers in
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* Exynos4412 SoC. As device tree coverage for Exynos4412 increases, additional
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* nodes can be added to this file.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "exynos4x12.dtsi"
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/ {
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compatible = "samsung,exynos4412";
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gic:interrupt-controller@10490000 {
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cpu-offset = <0x4000>;
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};
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interrupt-controller@10440000 {
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samsung,combiner-nr = <20>;
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interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
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<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
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<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
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<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
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<0 107 0>, <0 108 0>, <0 48 0>, <0 42 0>;
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};
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mct@10050000 {
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compatible = "samsung,exynos4412-mct";
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reg = <0x10050000 0x800>;
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interrupt-controller;
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#interrups-cells = <2>;
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interrupt-parent = <&mct_map>;
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interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
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<4 0>, <5 0>, <6 0>, <7 0>;
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clocks = <&clock 3>, <&clock 344>;
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clock-names = "fin_pll", "mct";
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mct_map: mct-map {
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#interrupt-cells = <2>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = <0x0 0 &gic 0 57 0>,
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<0x1 0 &combiner 12 5>,
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<0x2 0 &combiner 12 6>,
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<0x3 0 &combiner 12 7>,
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<0x4 0 &gic 1 12 0>,
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<0x5 0 &gic 1 12 0>,
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<0x6 0 &gic 1 12 0>,
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<0x7 0 &gic 1 12 0>;
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};
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};
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mshc@12550000 {
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compatible = "samsung,exynos4412-dw-mshc";
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reg = <0x12550000 0x1000>;
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interrupts = <0 77 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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