258 lines
6.5 KiB
C
258 lines
6.5 KiB
C
/*
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* Copyright (c) 2016, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/of_graph.h>
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#include "adv7511.h"
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static const struct reg_sequence adv7533_fixed_registers[] = {
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{ 0x16, 0x20 },
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{ 0x9a, 0xe0 },
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{ 0xba, 0x70 },
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{ 0xde, 0x82 },
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{ 0xe4, 0x40 },
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{ 0xe5, 0x80 },
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};
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static const struct reg_sequence adv7533_cec_fixed_registers[] = {
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{ 0x15, 0xd0 },
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{ 0x17, 0xd0 },
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{ 0x24, 0x20 },
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{ 0x57, 0x11 },
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{ 0x05, 0xc8 },
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};
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static const struct regmap_config adv7533_cec_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = 0xff,
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.cache_type = REGCACHE_RBTREE,
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};
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static void adv7511_dsi_config_timing_gen(struct adv7511 *adv)
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{
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struct mipi_dsi_device *dsi = adv->dsi;
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struct drm_display_mode *mode = &adv->curr_mode;
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unsigned int hsw, hfp, hbp, vsw, vfp, vbp;
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u8 clock_div_by_lanes[] = { 6, 4, 3 }; /* 2, 3, 4 lanes */
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hsw = mode->hsync_end - mode->hsync_start;
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hfp = mode->hsync_start - mode->hdisplay;
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hbp = mode->htotal - mode->hsync_end;
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vsw = mode->vsync_end - mode->vsync_start;
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vfp = mode->vsync_start - mode->vdisplay;
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vbp = mode->vtotal - mode->vsync_end;
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/* set pixel clock divider mode */
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regmap_write(adv->regmap_cec, 0x16,
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clock_div_by_lanes[dsi->lanes - 2] << 3);
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/* horizontal porch params */
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regmap_write(adv->regmap_cec, 0x28, mode->htotal >> 4);
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regmap_write(adv->regmap_cec, 0x29, (mode->htotal << 4) & 0xff);
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regmap_write(adv->regmap_cec, 0x2a, hsw >> 4);
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regmap_write(adv->regmap_cec, 0x2b, (hsw << 4) & 0xff);
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regmap_write(adv->regmap_cec, 0x2c, hfp >> 4);
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regmap_write(adv->regmap_cec, 0x2d, (hfp << 4) & 0xff);
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regmap_write(adv->regmap_cec, 0x2e, hbp >> 4);
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regmap_write(adv->regmap_cec, 0x2f, (hbp << 4) & 0xff);
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/* vertical porch params */
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regmap_write(adv->regmap_cec, 0x30, mode->vtotal >> 4);
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regmap_write(adv->regmap_cec, 0x31, (mode->vtotal << 4) & 0xff);
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regmap_write(adv->regmap_cec, 0x32, vsw >> 4);
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regmap_write(adv->regmap_cec, 0x33, (vsw << 4) & 0xff);
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regmap_write(adv->regmap_cec, 0x34, vfp >> 4);
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regmap_write(adv->regmap_cec, 0x35, (vfp << 4) & 0xff);
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regmap_write(adv->regmap_cec, 0x36, vbp >> 4);
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regmap_write(adv->regmap_cec, 0x37, (vbp << 4) & 0xff);
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}
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void adv7533_dsi_power_on(struct adv7511 *adv)
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{
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struct mipi_dsi_device *dsi = adv->dsi;
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if (adv->use_timing_gen)
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adv7511_dsi_config_timing_gen(adv);
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/* set number of dsi lanes */
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regmap_write(adv->regmap_cec, 0x1c, dsi->lanes << 4);
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if (adv->use_timing_gen) {
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/* reset internal timing generator */
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regmap_write(adv->regmap_cec, 0x27, 0xcb);
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regmap_write(adv->regmap_cec, 0x27, 0x8b);
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regmap_write(adv->regmap_cec, 0x27, 0xcb);
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} else {
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/* disable internal timing generator */
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regmap_write(adv->regmap_cec, 0x27, 0x0b);
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}
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/* enable hdmi */
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regmap_write(adv->regmap_cec, 0x03, 0x89);
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/* disable test mode */
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regmap_write(adv->regmap_cec, 0x55, 0x00);
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regmap_register_patch(adv->regmap_cec, adv7533_cec_fixed_registers,
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ARRAY_SIZE(adv7533_cec_fixed_registers));
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}
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void adv7533_dsi_power_off(struct adv7511 *adv)
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{
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/* disable hdmi */
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regmap_write(adv->regmap_cec, 0x03, 0x0b);
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/* disable internal timing generator */
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regmap_write(adv->regmap_cec, 0x27, 0x0b);
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}
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void adv7533_mode_set(struct adv7511 *adv, struct drm_display_mode *mode)
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{
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struct mipi_dsi_device *dsi = adv->dsi;
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int lanes, ret;
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if (adv->num_dsi_lanes != 4)
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return;
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if (mode->clock > 80000)
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lanes = 4;
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else
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lanes = 3;
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if (lanes != dsi->lanes) {
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mipi_dsi_detach(dsi);
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dsi->lanes = lanes;
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ret = mipi_dsi_attach(dsi);
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if (ret)
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dev_err(&dsi->dev, "failed to change host lanes\n");
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}
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}
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int adv7533_patch_registers(struct adv7511 *adv)
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{
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return regmap_register_patch(adv->regmap,
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adv7533_fixed_registers,
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ARRAY_SIZE(adv7533_fixed_registers));
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}
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void adv7533_uninit_cec(struct adv7511 *adv)
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{
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i2c_unregister_device(adv->i2c_cec);
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}
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int adv7533_init_cec(struct adv7511 *adv)
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{
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int ret;
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adv->i2c_cec = i2c_new_dummy(adv->i2c_main->adapter,
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adv->i2c_main->addr - 1);
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if (!adv->i2c_cec)
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return -ENOMEM;
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adv->regmap_cec = devm_regmap_init_i2c(adv->i2c_cec,
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&adv7533_cec_regmap_config);
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if (IS_ERR(adv->regmap_cec)) {
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ret = PTR_ERR(adv->regmap_cec);
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goto err;
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}
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ret = regmap_register_patch(adv->regmap_cec,
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adv7533_cec_fixed_registers,
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ARRAY_SIZE(adv7533_cec_fixed_registers));
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if (ret)
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goto err;
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return 0;
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err:
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adv7533_uninit_cec(adv);
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return ret;
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}
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int adv7533_attach_dsi(struct adv7511 *adv)
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{
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struct device *dev = &adv->i2c_main->dev;
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struct mipi_dsi_host *host;
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struct mipi_dsi_device *dsi;
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int ret = 0;
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const struct mipi_dsi_device_info info = { .type = "adv7533",
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.channel = 0,
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.node = NULL,
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};
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host = of_find_mipi_dsi_host_by_node(adv->host_node);
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if (!host) {
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dev_err(dev, "failed to find dsi host\n");
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return -EPROBE_DEFER;
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}
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dsi = mipi_dsi_device_register_full(host, &info);
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if (IS_ERR(dsi)) {
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dev_err(dev, "failed to create dsi device\n");
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ret = PTR_ERR(dsi);
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goto err_dsi_device;
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}
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adv->dsi = dsi;
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dsi->lanes = adv->num_dsi_lanes;
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dsi->format = MIPI_DSI_FMT_RGB888;
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dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
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MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE;
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ret = mipi_dsi_attach(dsi);
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if (ret < 0) {
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dev_err(dev, "failed to attach dsi to host\n");
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goto err_dsi_attach;
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}
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return 0;
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err_dsi_attach:
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mipi_dsi_device_unregister(dsi);
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err_dsi_device:
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return ret;
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}
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void adv7533_detach_dsi(struct adv7511 *adv)
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{
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mipi_dsi_detach(adv->dsi);
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mipi_dsi_device_unregister(adv->dsi);
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}
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int adv7533_parse_dt(struct device_node *np, struct adv7511 *adv)
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{
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u32 num_lanes;
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of_property_read_u32(np, "adi,dsi-lanes", &num_lanes);
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if (num_lanes < 1 || num_lanes > 4)
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return -EINVAL;
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adv->num_dsi_lanes = num_lanes;
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adv->host_node = of_graph_get_remote_node(np, 0, 0);
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if (!adv->host_node)
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return -ENODEV;
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of_node_put(adv->host_node);
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adv->use_timing_gen = !of_property_read_bool(np,
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"adi,disable-timing-generator");
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/* TODO: Check if these need to be parsed by DT or not */
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adv->rgb = true;
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adv->embedded_sync = false;
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return 0;
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}
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