549 lines
14 KiB
C
549 lines
14 KiB
C
/*
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* Copyright (c) 2011-2014, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _NVME_H
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#define _NVME_H
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#include <linux/nvme.h>
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#include <linux/cdev.h>
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#include <linux/pci.h>
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#include <linux/kref.h>
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#include <linux/blk-mq.h>
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#include <linux/lightnvm.h>
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#include <linux/sed-opal.h>
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#include <linux/fault-inject.h>
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#include <linux/rcupdate.h>
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extern unsigned int nvme_io_timeout;
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#define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
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extern unsigned int admin_timeout;
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#define ADMIN_TIMEOUT (admin_timeout * HZ)
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#define NVME_DEFAULT_KATO 5
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#define NVME_KATO_GRACE 10
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extern struct workqueue_struct *nvme_wq;
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extern struct workqueue_struct *nvme_reset_wq;
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extern struct workqueue_struct *nvme_delete_wq;
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enum {
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NVME_NS_LBA = 0,
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NVME_NS_LIGHTNVM = 1,
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};
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/*
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* List of workarounds for devices that required behavior not specified in
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* the standard.
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*/
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enum nvme_quirks {
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/*
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* Prefers I/O aligned to a stripe size specified in a vendor
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* specific Identify field.
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*/
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NVME_QUIRK_STRIPE_SIZE = (1 << 0),
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/*
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* The controller doesn't handle Identify value others than 0 or 1
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* correctly.
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*/
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NVME_QUIRK_IDENTIFY_CNS = (1 << 1),
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/*
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* The controller deterministically returns O's on reads to
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* logical blocks that deallocate was called on.
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*/
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NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2),
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/*
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* The controller needs a delay before starts checking the device
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* readiness, which is done by reading the NVME_CSTS_RDY bit.
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*/
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NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3),
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/*
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* APST should not be used.
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*/
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NVME_QUIRK_NO_APST = (1 << 4),
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/*
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* The deepest sleep state should not be used.
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*/
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NVME_QUIRK_NO_DEEPEST_PS = (1 << 5),
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/*
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* Supports the LighNVM command set if indicated in vs[1].
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*/
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NVME_QUIRK_LIGHTNVM = (1 << 6),
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/*
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* Set MEDIUM priority on SQ creation
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*/
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NVME_QUIRK_MEDIUM_PRIO_SQ = (1 << 7),
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};
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/*
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* Common request structure for NVMe passthrough. All drivers must have
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* this structure as the first member of their request-private data.
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*/
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struct nvme_request {
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struct nvme_command *cmd;
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union nvme_result result;
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u8 retries;
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u8 flags;
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u16 status;
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};
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/*
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* Mark a bio as coming in through the mpath node.
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*/
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#define REQ_NVME_MPATH REQ_DRV
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enum {
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NVME_REQ_CANCELLED = (1 << 0),
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NVME_REQ_USERCMD = (1 << 1),
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};
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static inline struct nvme_request *nvme_req(struct request *req)
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{
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return blk_mq_rq_to_pdu(req);
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}
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/* The below value is the specific amount of delay needed before checking
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* readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
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* NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
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* found empirically.
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*/
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#define NVME_QUIRK_DELAY_AMOUNT 2300
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enum nvme_ctrl_state {
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NVME_CTRL_NEW,
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NVME_CTRL_LIVE,
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NVME_CTRL_ADMIN_ONLY, /* Only admin queue live */
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NVME_CTRL_RESETTING,
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NVME_CTRL_CONNECTING,
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NVME_CTRL_DELETING,
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NVME_CTRL_DEAD,
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};
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struct nvme_ctrl {
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enum nvme_ctrl_state state;
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bool identified;
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spinlock_t lock;
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const struct nvme_ctrl_ops *ops;
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struct request_queue *admin_q;
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struct request_queue *connect_q;
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struct device *dev;
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int instance;
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struct blk_mq_tag_set *tagset;
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struct blk_mq_tag_set *admin_tagset;
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struct list_head namespaces;
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struct rw_semaphore namespaces_rwsem;
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struct device ctrl_device;
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struct device *device; /* char device */
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struct cdev cdev;
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struct work_struct reset_work;
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struct work_struct delete_work;
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struct nvme_subsystem *subsys;
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struct list_head subsys_entry;
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struct opal_dev *opal_dev;
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char name[12];
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u16 cntlid;
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u32 ctrl_config;
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u16 mtfa;
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u32 queue_count;
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u64 cap;
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u32 page_size;
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u32 max_hw_sectors;
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u32 max_segments;
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u16 oncs;
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u16 oacs;
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u16 nssa;
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u16 nr_streams;
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atomic_t abort_limit;
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u8 vwc;
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u32 vs;
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u32 sgls;
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u16 kas;
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u8 npss;
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u8 apsta;
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u32 oaes;
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u32 aen_result;
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unsigned int shutdown_timeout;
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unsigned int kato;
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bool subsystem;
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unsigned long quirks;
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struct nvme_id_power_state psd[32];
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struct nvme_effects_log *effects;
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struct work_struct scan_work;
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struct work_struct async_event_work;
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struct delayed_work ka_work;
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struct nvme_command ka_cmd;
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struct work_struct fw_act_work;
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unsigned long events;
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/* Power saving configuration */
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u64 ps_max_latency_us;
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bool apst_enabled;
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/* PCIe only: */
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u32 hmpre;
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u32 hmmin;
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u32 hmminds;
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u16 hmmaxd;
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/* Fabrics only */
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u16 sqsize;
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u32 ioccsz;
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u32 iorcsz;
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u16 icdoff;
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u16 maxcmd;
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int nr_reconnects;
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struct nvmf_ctrl_options *opts;
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};
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struct nvme_subsystem {
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int instance;
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struct device dev;
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/*
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* Because we unregister the device on the last put we need
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* a separate refcount.
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*/
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struct kref ref;
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struct list_head entry;
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struct mutex lock;
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struct list_head ctrls;
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struct list_head nsheads;
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char subnqn[NVMF_NQN_SIZE];
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char serial[20];
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char model[40];
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char firmware_rev[8];
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u8 cmic;
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u16 vendor_id;
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struct ida ns_ida;
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};
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/*
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* Container structure for uniqueue namespace identifiers.
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*/
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struct nvme_ns_ids {
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u8 eui64[8];
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u8 nguid[16];
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uuid_t uuid;
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};
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/*
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* Anchor structure for namespaces. There is one for each namespace in a
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* NVMe subsystem that any of our controllers can see, and the namespace
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* structure for each controller is chained of it. For private namespaces
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* there is a 1:1 relation to our namespace structures, that is ->list
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* only ever has a single entry for private namespaces.
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*/
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struct nvme_ns_head {
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#ifdef CONFIG_NVME_MULTIPATH
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struct gendisk *disk;
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struct nvme_ns __rcu *current_path;
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struct bio_list requeue_list;
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spinlock_t requeue_lock;
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struct work_struct requeue_work;
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#endif
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struct list_head list;
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struct srcu_struct srcu;
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struct nvme_subsystem *subsys;
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unsigned ns_id;
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struct nvme_ns_ids ids;
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struct list_head entry;
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struct kref ref;
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int instance;
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};
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#ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
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struct nvme_fault_inject {
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struct fault_attr attr;
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struct dentry *parent;
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bool dont_retry; /* DNR, do not retry */
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u16 status; /* status code */
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};
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#endif
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struct nvme_ns {
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struct list_head list;
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struct nvme_ctrl *ctrl;
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struct request_queue *queue;
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struct gendisk *disk;
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struct list_head siblings;
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struct nvm_dev *ndev;
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struct kref kref;
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struct nvme_ns_head *head;
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int lba_shift;
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u16 ms;
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u16 sgs;
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u32 sws;
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bool ext;
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u8 pi_type;
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unsigned long flags;
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#define NVME_NS_REMOVING 0
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#define NVME_NS_DEAD 1
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u16 noiob;
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#ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
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struct nvme_fault_inject fault_inject;
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#endif
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};
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struct nvme_ctrl_ops {
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const char *name;
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struct module *module;
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unsigned int flags;
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#define NVME_F_FABRICS (1 << 0)
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#define NVME_F_METADATA_SUPPORTED (1 << 1)
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int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
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int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
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int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
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void (*free_ctrl)(struct nvme_ctrl *ctrl);
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void (*submit_async_event)(struct nvme_ctrl *ctrl);
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void (*delete_ctrl)(struct nvme_ctrl *ctrl);
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int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
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void (*stop_ctrl)(struct nvme_ctrl *ctrl);
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};
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#ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
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void nvme_fault_inject_init(struct nvme_ns *ns);
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void nvme_fault_inject_fini(struct nvme_ns *ns);
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void nvme_should_fail(struct request *req);
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#else
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static inline void nvme_fault_inject_init(struct nvme_ns *ns) {}
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static inline void nvme_fault_inject_fini(struct nvme_ns *ns) {}
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static inline void nvme_should_fail(struct request *req) {}
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#endif
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static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
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{
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u32 val = 0;
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if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
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return false;
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return val & NVME_CSTS_RDY;
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}
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static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
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{
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if (!ctrl->subsystem)
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return -ENOTTY;
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return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
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}
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static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
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{
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return (sector >> (ns->lba_shift - 9));
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}
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static inline void nvme_cleanup_cmd(struct request *req)
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{
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if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
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kfree(page_address(req->special_vec.bv_page) +
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req->special_vec.bv_offset);
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}
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}
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static inline void nvme_end_request(struct request *req, __le16 status,
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union nvme_result result)
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{
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struct nvme_request *rq = nvme_req(req);
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rq->status = le16_to_cpu(status) >> 1;
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rq->result = result;
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/* inject error when permitted by fault injection framework */
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nvme_should_fail(req);
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blk_mq_complete_request(req);
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}
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static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
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{
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get_device(ctrl->device);
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}
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static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
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{
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put_device(ctrl->device);
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}
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void nvme_complete_rq(struct request *req);
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void nvme_cancel_request(struct request *req, void *data, bool reserved);
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bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
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enum nvme_ctrl_state new_state);
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int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
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int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
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int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
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int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
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const struct nvme_ctrl_ops *ops, unsigned long quirks);
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void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
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void nvme_start_ctrl(struct nvme_ctrl *ctrl);
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void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
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void nvme_put_ctrl(struct nvme_ctrl *ctrl);
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int nvme_init_identify(struct nvme_ctrl *ctrl);
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void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
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int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
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bool send);
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void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
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volatile union nvme_result *res);
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void nvme_stop_queues(struct nvme_ctrl *ctrl);
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void nvme_start_queues(struct nvme_ctrl *ctrl);
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void nvme_kill_queues(struct nvme_ctrl *ctrl);
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void nvme_unfreeze(struct nvme_ctrl *ctrl);
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void nvme_wait_freeze(struct nvme_ctrl *ctrl);
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void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
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void nvme_start_freeze(struct nvme_ctrl *ctrl);
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#define NVME_QID_ANY -1
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struct request *nvme_alloc_request(struct request_queue *q,
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struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid);
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blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
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struct nvme_command *cmd);
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int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
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void *buf, unsigned bufflen);
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int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
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union nvme_result *result, void *buffer, unsigned bufflen,
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unsigned timeout, int qid, int at_head,
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blk_mq_req_flags_t flags);
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int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
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void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
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int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
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int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
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int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
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int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl);
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int nvme_get_log_ext(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
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u8 log_page, void *log, size_t size, u64 offset);
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extern const struct attribute_group nvme_ns_id_attr_group;
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extern const struct block_device_operations nvme_ns_head_ops;
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#ifdef CONFIG_NVME_MULTIPATH
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void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns,
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struct nvme_ctrl *ctrl, int *flags);
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void nvme_failover_req(struct request *req);
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bool nvme_req_needs_failover(struct request *req, blk_status_t error);
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void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
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int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
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void nvme_mpath_add_disk(struct nvme_ns_head *head);
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void nvme_mpath_remove_disk(struct nvme_ns_head *head);
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static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns)
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{
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struct nvme_ns_head *head = ns->head;
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if (head && ns == rcu_access_pointer(head->current_path))
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rcu_assign_pointer(head->current_path, NULL);
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}
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struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
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static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
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{
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struct nvme_ns_head *head = ns->head;
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if (head->disk && list_empty(&head->list))
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kblockd_schedule_work(&head->requeue_work);
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}
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#else
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/*
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* Without the multipath code enabled, multiple controller per subsystems are
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* visible as devices and thus we cannot use the subsystem instance.
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*/
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static inline void nvme_set_disk_name(char *disk_name, struct nvme_ns *ns,
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struct nvme_ctrl *ctrl, int *flags)
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{
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sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->head->instance);
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}
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static inline void nvme_failover_req(struct request *req)
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{
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}
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static inline bool nvme_req_needs_failover(struct request *req,
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blk_status_t error)
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{
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return false;
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}
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static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
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{
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}
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static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
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struct nvme_ns_head *head)
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{
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return 0;
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}
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static inline void nvme_mpath_add_disk(struct nvme_ns_head *head)
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{
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}
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static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
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{
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}
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static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns)
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{
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}
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static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
|
|
{
|
|
}
|
|
#endif /* CONFIG_NVME_MULTIPATH */
|
|
|
|
#ifdef CONFIG_NVM
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|
void nvme_nvm_update_nvm_info(struct nvme_ns *ns);
|
|
int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
|
|
void nvme_nvm_unregister(struct nvme_ns *ns);
|
|
int nvme_nvm_register_sysfs(struct nvme_ns *ns);
|
|
void nvme_nvm_unregister_sysfs(struct nvme_ns *ns);
|
|
int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
|
|
#else
|
|
static inline void nvme_nvm_update_nvm_info(struct nvme_ns *ns) {};
|
|
static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
|
|
int node)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
|
|
static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns)
|
|
{
|
|
return 0;
|
|
}
|
|
static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {};
|
|
static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
|
|
unsigned long arg)
|
|
{
|
|
return -ENOTTY;
|
|
}
|
|
#endif /* CONFIG_NVM */
|
|
|
|
static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
|
|
{
|
|
return dev_to_disk(dev)->private_data;
|
|
}
|
|
|
|
int __init nvme_core_init(void);
|
|
void nvme_core_exit(void);
|
|
|
|
#endif /* _NVME_H */
|