1198 lines
30 KiB
C
1198 lines
30 KiB
C
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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//
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// This file is provided under a dual BSD/GPLv2 license. When using or
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// redistributing this file, you may do so under either license.
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//
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// Copyright(c) 2018 Intel Corporation. All rights reserved.
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//
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// Authors: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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// Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
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// Rander Wang <rander.wang@intel.com>
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// Keyon Jie <yang.jie@linux.intel.com>
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//
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/*
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* Hardware interface for generic Intel audio DSP HDA IP
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*/
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#include <sound/hdaudio_ext.h>
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#include <sound/hda_register.h>
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#include <linux/acpi.h>
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#include <linux/module.h>
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#include <linux/soundwire/sdw.h>
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#include <linux/soundwire/sdw_intel.h>
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#include <sound/intel-nhlt.h>
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#include <sound/sof.h>
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#include <sound/sof/xtensa.h>
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#include "../sof-audio.h"
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#include "../ops.h"
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#include "hda.h"
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
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#include <sound/soc-acpi-intel-match.h>
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#endif
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/* platform specific devices */
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#include "shim.h"
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#define EXCEPT_MAX_HDR_SIZE 0x400
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
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/*
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* The default for SoundWire clock stop quirks is to power gate the IP
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* and do a Bus Reset, this will need to be modified when the DSP
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* needs to remain in D0i3 so that the Master does not lose context
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* and enumeration is not required on clock restart
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*/
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static int sdw_clock_stop_quirks = SDW_INTEL_CLK_STOP_BUS_RESET;
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module_param(sdw_clock_stop_quirks, int, 0444);
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MODULE_PARM_DESC(sdw_clock_stop_quirks, "SOF SoundWire clock stop quirks");
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static int sdw_params_stream(struct device *dev,
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struct sdw_intel_stream_params_data *params_data)
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{
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struct snd_sof_dev *sdev = dev_get_drvdata(dev);
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struct snd_soc_dai *d = params_data->dai;
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struct sof_ipc_dai_config config;
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struct sof_ipc_reply reply;
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int link_id = params_data->link_id;
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int alh_stream_id = params_data->alh_stream_id;
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int ret;
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u32 size = sizeof(config);
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memset(&config, 0, size);
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config.hdr.size = size;
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config.hdr.cmd = SOF_IPC_GLB_DAI_MSG | SOF_IPC_DAI_CONFIG;
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config.type = SOF_DAI_INTEL_ALH;
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config.dai_index = (link_id << 8) | (d->id);
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config.alh.stream_id = alh_stream_id;
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/* send message to DSP */
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ret = sof_ipc_tx_message(sdev->ipc,
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config.hdr.cmd, &config, size, &reply,
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sizeof(reply));
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if (ret < 0) {
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dev_err(sdev->dev,
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"error: failed to set DAI hw_params for link %d dai->id %d ALH %d\n",
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link_id, d->id, alh_stream_id);
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}
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return ret;
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}
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static int sdw_free_stream(struct device *dev,
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struct sdw_intel_stream_free_data *free_data)
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{
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struct snd_sof_dev *sdev = dev_get_drvdata(dev);
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struct snd_soc_dai *d = free_data->dai;
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struct sof_ipc_dai_config config;
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struct sof_ipc_reply reply;
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int link_id = free_data->link_id;
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int ret;
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u32 size = sizeof(config);
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memset(&config, 0, size);
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config.hdr.size = size;
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config.hdr.cmd = SOF_IPC_GLB_DAI_MSG | SOF_IPC_DAI_CONFIG;
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config.type = SOF_DAI_INTEL_ALH;
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config.dai_index = (link_id << 8) | d->id;
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config.alh.stream_id = 0xFFFF; /* invalid value on purpose */
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/* send message to DSP */
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ret = sof_ipc_tx_message(sdev->ipc,
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config.hdr.cmd, &config, size, &reply,
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sizeof(reply));
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if (ret < 0) {
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dev_err(sdev->dev,
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"error: failed to free stream for link %d dai->id %d\n",
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link_id, d->id);
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}
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return ret;
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}
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static const struct sdw_intel_ops sdw_callback = {
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.params_stream = sdw_params_stream,
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.free_stream = sdw_free_stream,
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};
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void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable)
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{
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sdw_intel_enable_irq(sdev->bar[HDA_DSP_BAR], enable);
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}
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static int hda_sdw_acpi_scan(struct snd_sof_dev *sdev)
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{
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struct sof_intel_hda_dev *hdev;
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acpi_handle handle;
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int ret;
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handle = ACPI_HANDLE(sdev->dev);
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/* save ACPI info for the probe step */
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hdev = sdev->pdata->hw_pdata;
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ret = sdw_intel_acpi_scan(handle, &hdev->info);
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if (ret < 0)
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return -EINVAL;
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return 0;
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}
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static int hda_sdw_probe(struct snd_sof_dev *sdev)
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{
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struct sof_intel_hda_dev *hdev;
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struct sdw_intel_res res;
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void *sdw;
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hdev = sdev->pdata->hw_pdata;
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memset(&res, 0, sizeof(res));
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res.mmio_base = sdev->bar[HDA_DSP_BAR];
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res.irq = sdev->ipc_irq;
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res.handle = hdev->info.handle;
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res.parent = sdev->dev;
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res.ops = &sdw_callback;
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res.dev = sdev->dev;
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res.clock_stop_quirks = sdw_clock_stop_quirks;
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/*
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* ops and arg fields are not populated for now,
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* they will be needed when the DAI callbacks are
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* provided
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*/
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/* we could filter links here if needed, e.g for quirks */
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res.count = hdev->info.count;
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res.link_mask = hdev->info.link_mask;
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sdw = sdw_intel_probe(&res);
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if (!sdw) {
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dev_err(sdev->dev, "error: SoundWire probe failed\n");
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return -EINVAL;
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}
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/* save context */
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hdev->sdw = sdw;
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return 0;
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}
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int hda_sdw_startup(struct snd_sof_dev *sdev)
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{
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struct sof_intel_hda_dev *hdev;
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hdev = sdev->pdata->hw_pdata;
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if (!hdev->sdw)
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return 0;
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return sdw_intel_startup(hdev->sdw);
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}
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static int hda_sdw_exit(struct snd_sof_dev *sdev)
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{
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struct sof_intel_hda_dev *hdev;
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hdev = sdev->pdata->hw_pdata;
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hda_sdw_int_enable(sdev, false);
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if (hdev->sdw)
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sdw_intel_exit(hdev->sdw);
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hdev->sdw = NULL;
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return 0;
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}
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static bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev)
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{
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struct sof_intel_hda_dev *hdev;
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bool ret = false;
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u32 irq_status;
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hdev = sdev->pdata->hw_pdata;
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if (!hdev->sdw)
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return ret;
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/* store status */
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irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS2);
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/* invalid message ? */
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if (irq_status == 0xffffffff)
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goto out;
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/* SDW message ? */
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if (irq_status & HDA_DSP_REG_ADSPIS2_SNDW)
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ret = true;
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out:
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return ret;
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}
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static irqreturn_t hda_dsp_sdw_thread(int irq, void *context)
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{
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return sdw_intel_thread(irq, context);
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}
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static bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev)
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{
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struct sof_intel_hda_dev *hdev;
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hdev = sdev->pdata->hw_pdata;
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if (hdev->sdw &&
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snd_sof_dsp_read(sdev, HDA_DSP_BAR,
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HDA_DSP_REG_SNDW_WAKE_STS))
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return true;
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return false;
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}
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void hda_sdw_process_wakeen(struct snd_sof_dev *sdev)
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{
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struct sof_intel_hda_dev *hdev;
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hdev = sdev->pdata->hw_pdata;
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if (!hdev->sdw)
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return;
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sdw_intel_process_wakeen_event(hdev->sdw);
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}
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#endif
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/*
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* Debug
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*/
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struct hda_dsp_msg_code {
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u32 code;
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const char *msg;
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};
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static bool hda_use_msi = IS_ENABLED(CONFIG_PCI);
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG)
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module_param_named(use_msi, hda_use_msi, bool, 0444);
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MODULE_PARM_DESC(use_msi, "SOF HDA use PCI MSI mode");
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#endif
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
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static int hda_dmic_num = -1;
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module_param_named(dmic_num, hda_dmic_num, int, 0444);
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MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number");
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static bool hda_codec_use_common_hdmi = IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI);
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module_param_named(use_common_hdmi, hda_codec_use_common_hdmi, bool, 0444);
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MODULE_PARM_DESC(use_common_hdmi, "SOF HDA use common HDMI codec driver");
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#endif
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static const struct hda_dsp_msg_code hda_dsp_rom_msg[] = {
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{HDA_DSP_ROM_FW_MANIFEST_LOADED, "status: manifest loaded"},
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{HDA_DSP_ROM_FW_FW_LOADED, "status: fw loaded"},
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{HDA_DSP_ROM_FW_ENTERED, "status: fw entered"},
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{HDA_DSP_ROM_CSE_ERROR, "error: cse error"},
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{HDA_DSP_ROM_CSE_WRONG_RESPONSE, "error: cse wrong response"},
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{HDA_DSP_ROM_IMR_TO_SMALL, "error: IMR too small"},
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{HDA_DSP_ROM_BASE_FW_NOT_FOUND, "error: base fw not found"},
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{HDA_DSP_ROM_CSE_VALIDATION_FAILED, "error: signature verification failed"},
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{HDA_DSP_ROM_IPC_FATAL_ERROR, "error: ipc fatal error"},
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{HDA_DSP_ROM_L2_CACHE_ERROR, "error: L2 cache error"},
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{HDA_DSP_ROM_LOAD_OFFSET_TO_SMALL, "error: load offset too small"},
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{HDA_DSP_ROM_API_PTR_INVALID, "error: API ptr invalid"},
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{HDA_DSP_ROM_BASEFW_INCOMPAT, "error: base fw incompatible"},
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{HDA_DSP_ROM_UNHANDLED_INTERRUPT, "error: unhandled interrupt"},
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{HDA_DSP_ROM_MEMORY_HOLE_ECC, "error: ECC memory hole"},
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{HDA_DSP_ROM_KERNEL_EXCEPTION, "error: kernel exception"},
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{HDA_DSP_ROM_USER_EXCEPTION, "error: user exception"},
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{HDA_DSP_ROM_UNEXPECTED_RESET, "error: unexpected reset"},
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{HDA_DSP_ROM_NULL_FW_ENTRY, "error: null FW entry point"},
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};
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static void hda_dsp_get_status_skl(struct snd_sof_dev *sdev)
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{
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u32 status;
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int i;
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status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
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HDA_ADSP_FW_STATUS_SKL);
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for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) {
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if (status == hda_dsp_rom_msg[i].code) {
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dev_err(sdev->dev, "%s - code %8.8x\n",
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hda_dsp_rom_msg[i].msg, status);
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return;
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}
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}
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/* not for us, must be generic sof message */
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dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status);
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}
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static void hda_dsp_get_status(struct snd_sof_dev *sdev)
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{
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u32 status;
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int i;
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status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
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HDA_DSP_SRAM_REG_ROM_STATUS);
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for (i = 0; i < ARRAY_SIZE(hda_dsp_rom_msg); i++) {
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if (status == hda_dsp_rom_msg[i].code) {
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dev_err(sdev->dev, "%s - code %8.8x\n",
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hda_dsp_rom_msg[i].msg, status);
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return;
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}
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}
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/* not for us, must be generic sof message */
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dev_dbg(sdev->dev, "unknown ROM status value %8.8x\n", status);
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}
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static void hda_dsp_get_registers(struct snd_sof_dev *sdev,
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struct sof_ipc_dsp_oops_xtensa *xoops,
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struct sof_ipc_panic_info *panic_info,
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u32 *stack, size_t stack_words)
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{
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u32 offset = sdev->dsp_oops_offset;
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/* first read registers */
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sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops));
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/* note: variable AR register array is not read */
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/* then get panic info */
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if (xoops->arch_hdr.totalsize > EXCEPT_MAX_HDR_SIZE) {
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dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n",
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xoops->arch_hdr.totalsize);
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return;
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}
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offset += xoops->arch_hdr.totalsize;
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sof_block_read(sdev, sdev->mmio_bar, offset,
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panic_info, sizeof(*panic_info));
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/* then get the stack */
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offset += sizeof(*panic_info);
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sof_block_read(sdev, sdev->mmio_bar, offset, stack,
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stack_words * sizeof(u32));
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}
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void hda_dsp_dump_skl(struct snd_sof_dev *sdev, u32 flags)
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{
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struct sof_ipc_dsp_oops_xtensa xoops;
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struct sof_ipc_panic_info panic_info;
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u32 stack[HDA_DSP_STACK_DUMP_SIZE];
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u32 status, panic;
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/* try APL specific status message types first */
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hda_dsp_get_status_skl(sdev);
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/* now try generic SOF status messages */
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status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
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HDA_ADSP_ERROR_CODE_SKL);
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/*TODO: Check: there is no define in spec, but it is used in the code*/
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panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
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HDA_ADSP_ERROR_CODE_SKL + 0x4);
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if (sdev->fw_state == SOF_FW_BOOT_COMPLETE) {
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hda_dsp_get_registers(sdev, &xoops, &panic_info, stack,
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HDA_DSP_STACK_DUMP_SIZE);
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snd_sof_get_status(sdev, status, panic, &xoops, &panic_info,
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stack, HDA_DSP_STACK_DUMP_SIZE);
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} else {
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dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n",
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status, panic);
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hda_dsp_get_status_skl(sdev);
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}
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}
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void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags)
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{
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struct sof_ipc_dsp_oops_xtensa xoops;
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struct sof_ipc_panic_info panic_info;
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u32 stack[HDA_DSP_STACK_DUMP_SIZE];
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u32 status, panic;
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/* try APL specific status message types first */
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hda_dsp_get_status(sdev);
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/* now try generic SOF status messages */
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status = snd_sof_dsp_read(sdev, HDA_DSP_BAR,
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HDA_DSP_SRAM_REG_FW_STATUS);
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panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP);
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if (sdev->fw_state == SOF_FW_BOOT_COMPLETE) {
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hda_dsp_get_registers(sdev, &xoops, &panic_info, stack,
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HDA_DSP_STACK_DUMP_SIZE);
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snd_sof_get_status(sdev, status, panic, &xoops, &panic_info,
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stack, HDA_DSP_STACK_DUMP_SIZE);
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} else {
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dev_err(sdev->dev, "error: status = 0x%8.8x panic = 0x%8.8x\n",
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status, panic);
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hda_dsp_get_status(sdev);
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}
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}
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void hda_ipc_irq_dump(struct snd_sof_dev *sdev)
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{
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struct hdac_bus *bus = sof_to_bus(sdev);
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u32 adspis;
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u32 intsts;
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u32 intctl;
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u32 ppsts;
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u8 rirbsts;
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/* read key IRQ stats and config registers */
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adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS);
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intsts = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS);
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intctl = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL);
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ppsts = snd_sof_dsp_read(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPSTS);
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rirbsts = snd_hdac_chip_readb(bus, RIRBSTS);
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dev_err(sdev->dev,
|
|
"error: hda irq intsts 0x%8.8x intlctl 0x%8.8x rirb %2.2x\n",
|
|
intsts, intctl, rirbsts);
|
|
dev_err(sdev->dev,
|
|
"error: dsp irq ppsts 0x%8.8x adspis 0x%8.8x\n",
|
|
ppsts, adspis);
|
|
}
|
|
|
|
void hda_ipc_dump(struct snd_sof_dev *sdev)
|
|
{
|
|
u32 hipcie;
|
|
u32 hipct;
|
|
u32 hipcctl;
|
|
|
|
hda_ipc_irq_dump(sdev);
|
|
|
|
/* read IPC status */
|
|
hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE);
|
|
hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT);
|
|
hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL);
|
|
|
|
/* dump the IPC regs */
|
|
/* TODO: parse the raw msg */
|
|
dev_err(sdev->dev,
|
|
"error: host status 0x%8.8x dsp status 0x%8.8x mask 0x%8.8x\n",
|
|
hipcie, hipct, hipcctl);
|
|
}
|
|
|
|
static int hda_init(struct snd_sof_dev *sdev)
|
|
{
|
|
struct hda_bus *hbus;
|
|
struct hdac_bus *bus;
|
|
struct pci_dev *pci = to_pci_dev(sdev->dev);
|
|
int ret;
|
|
|
|
hbus = sof_to_hbus(sdev);
|
|
bus = sof_to_bus(sdev);
|
|
|
|
/* HDA bus init */
|
|
sof_hda_bus_init(bus, &pci->dev);
|
|
|
|
bus->use_posbuf = 1;
|
|
bus->bdl_pos_adj = 0;
|
|
bus->sync_write = 1;
|
|
|
|
mutex_init(&hbus->prepare_mutex);
|
|
hbus->pci = pci;
|
|
hbus->mixer_assigned = -1;
|
|
hbus->modelname = "sofbus";
|
|
|
|
/* initialise hdac bus */
|
|
bus->addr = pci_resource_start(pci, 0);
|
|
#if IS_ENABLED(CONFIG_PCI)
|
|
bus->remap_addr = pci_ioremap_bar(pci, 0);
|
|
#endif
|
|
if (!bus->remap_addr) {
|
|
dev_err(bus->dev, "error: ioremap error\n");
|
|
return -ENXIO;
|
|
}
|
|
|
|
/* HDA base */
|
|
sdev->bar[HDA_DSP_HDA_BAR] = bus->remap_addr;
|
|
|
|
/* init i915 and HDMI codecs */
|
|
ret = hda_codec_i915_init(sdev);
|
|
if (ret < 0)
|
|
dev_warn(sdev->dev, "init of i915 and HDMI codec failed\n");
|
|
|
|
/* get controller capabilities */
|
|
ret = hda_dsp_ctrl_get_caps(sdev);
|
|
if (ret < 0)
|
|
dev_err(sdev->dev, "error: get caps error\n");
|
|
|
|
return ret;
|
|
}
|
|
|
|
#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
|
|
|
|
static int check_nhlt_dmic(struct snd_sof_dev *sdev)
|
|
{
|
|
struct nhlt_acpi_table *nhlt;
|
|
int dmic_num;
|
|
|
|
nhlt = intel_nhlt_init(sdev->dev);
|
|
if (nhlt) {
|
|
dmic_num = intel_nhlt_get_dmic_geo(sdev->dev, nhlt);
|
|
intel_nhlt_free(nhlt);
|
|
if (dmic_num == 2 || dmic_num == 4)
|
|
return dmic_num;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const char *fixup_tplg_name(struct snd_sof_dev *sdev,
|
|
const char *sof_tplg_filename,
|
|
const char *idisp_str,
|
|
const char *dmic_str)
|
|
{
|
|
const char *tplg_filename = NULL;
|
|
char *filename;
|
|
char *split_ext;
|
|
|
|
filename = devm_kstrdup(sdev->dev, sof_tplg_filename, GFP_KERNEL);
|
|
if (!filename)
|
|
return NULL;
|
|
|
|
/* this assumes a .tplg extension */
|
|
split_ext = strsep(&filename, ".");
|
|
if (split_ext) {
|
|
tplg_filename = devm_kasprintf(sdev->dev, GFP_KERNEL,
|
|
"%s%s%s.tplg",
|
|
split_ext, idisp_str, dmic_str);
|
|
if (!tplg_filename)
|
|
return NULL;
|
|
}
|
|
return tplg_filename;
|
|
}
|
|
|
|
#endif
|
|
|
|
static int hda_init_caps(struct snd_sof_dev *sdev)
|
|
{
|
|
struct hdac_bus *bus = sof_to_bus(sdev);
|
|
struct snd_sof_pdata *pdata = sdev->pdata;
|
|
#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
|
|
struct hdac_ext_link *hlink;
|
|
#endif
|
|
struct sof_intel_hda_dev *hdev = pdata->hw_pdata;
|
|
u32 link_mask;
|
|
int ret = 0;
|
|
|
|
device_disable_async_suspend(bus->dev);
|
|
|
|
/* check if dsp is there */
|
|
if (bus->ppcap)
|
|
dev_dbg(sdev->dev, "PP capability, will probe DSP later.\n");
|
|
|
|
/* Init HDA controller after i915 init */
|
|
ret = hda_dsp_ctrl_init_chip(sdev, true);
|
|
if (ret < 0) {
|
|
dev_err(bus->dev, "error: init chip failed with ret: %d\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
|
|
/* scan SoundWire capabilities exposed by DSDT */
|
|
ret = hda_sdw_acpi_scan(sdev);
|
|
if (ret < 0) {
|
|
dev_dbg(sdev->dev, "skipping SoundWire, not detected with ACPI scan\n");
|
|
goto skip_soundwire;
|
|
}
|
|
|
|
link_mask = hdev->info.link_mask;
|
|
if (!link_mask) {
|
|
dev_dbg(sdev->dev, "skipping SoundWire, no links enabled\n");
|
|
goto skip_soundwire;
|
|
}
|
|
|
|
/*
|
|
* probe/allocate SoundWire resources.
|
|
* The hardware configuration takes place in hda_sdw_startup
|
|
* after power rails are enabled.
|
|
* It's entirely possible to have a mix of I2S/DMIC/SoundWire
|
|
* devices, so we allocate the resources in all cases.
|
|
*/
|
|
ret = hda_sdw_probe(sdev);
|
|
if (ret < 0) {
|
|
dev_err(sdev->dev, "error: SoundWire probe error\n");
|
|
return ret;
|
|
}
|
|
|
|
skip_soundwire:
|
|
|
|
#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
|
|
if (bus->mlcap)
|
|
snd_hdac_ext_bus_get_ml_capabilities(bus);
|
|
|
|
/* create codec instances */
|
|
hda_codec_probe_bus(sdev, hda_codec_use_common_hdmi);
|
|
|
|
if (!HDA_IDISP_CODEC(bus->codec_mask))
|
|
hda_codec_i915_display_power(sdev, false);
|
|
|
|
/*
|
|
* we are done probing so decrement link counts
|
|
*/
|
|
list_for_each_entry(hlink, &bus->hlink_list, list)
|
|
snd_hdac_ext_bus_link_put(bus, hlink);
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
static const struct sof_intel_dsp_desc
|
|
*get_chip_info(struct snd_sof_pdata *pdata)
|
|
{
|
|
const struct sof_dev_desc *desc = pdata->desc;
|
|
const struct sof_intel_dsp_desc *chip_info;
|
|
|
|
chip_info = desc->chip_info;
|
|
|
|
return chip_info;
|
|
}
|
|
|
|
static irqreturn_t hda_dsp_interrupt_handler(int irq, void *context)
|
|
{
|
|
struct snd_sof_dev *sdev = context;
|
|
|
|
/*
|
|
* Get global interrupt status. It includes all hardware interrupt
|
|
* sources in the Intel HD Audio controller.
|
|
*/
|
|
if (snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS) &
|
|
SOF_HDA_INTSTS_GIS) {
|
|
|
|
/* disable GIE interrupt */
|
|
snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
|
|
SOF_HDA_INTCTL,
|
|
SOF_HDA_INT_GLOBAL_EN,
|
|
0);
|
|
|
|
return IRQ_WAKE_THREAD;
|
|
}
|
|
|
|
return IRQ_NONE;
|
|
}
|
|
|
|
static irqreturn_t hda_dsp_interrupt_thread(int irq, void *context)
|
|
{
|
|
struct snd_sof_dev *sdev = context;
|
|
struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata;
|
|
|
|
/* deal with streams and controller first */
|
|
if (hda_dsp_check_stream_irq(sdev))
|
|
hda_dsp_stream_threaded_handler(irq, sdev);
|
|
|
|
if (hda_dsp_check_ipc_irq(sdev))
|
|
sof_ops(sdev)->irq_thread(irq, sdev);
|
|
|
|
if (hda_dsp_check_sdw_irq(sdev))
|
|
hda_dsp_sdw_thread(irq, hdev->sdw);
|
|
|
|
if (hda_sdw_check_wakeen_irq(sdev))
|
|
hda_sdw_process_wakeen(sdev);
|
|
|
|
/* enable GIE interrupt */
|
|
snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
|
|
SOF_HDA_INTCTL,
|
|
SOF_HDA_INT_GLOBAL_EN,
|
|
SOF_HDA_INT_GLOBAL_EN);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
int hda_dsp_probe(struct snd_sof_dev *sdev)
|
|
{
|
|
struct pci_dev *pci = to_pci_dev(sdev->dev);
|
|
struct sof_intel_hda_dev *hdev;
|
|
struct hdac_bus *bus;
|
|
const struct sof_intel_dsp_desc *chip;
|
|
int ret = 0;
|
|
|
|
/*
|
|
* detect DSP by checking class/subclass/prog-id information
|
|
* class=04 subclass 03 prog-if 00: no DSP, legacy driver is required
|
|
* class=04 subclass 01 prog-if 00: DSP is present
|
|
* (and may be required e.g. for DMIC or SSP support)
|
|
* class=04 subclass 03 prog-if 80: either of DSP or legacy mode works
|
|
*/
|
|
if (pci->class == 0x040300) {
|
|
dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n");
|
|
return -ENODEV;
|
|
} else if (pci->class != 0x040100 && pci->class != 0x040380) {
|
|
dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class);
|
|
return -ENODEV;
|
|
}
|
|
dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class);
|
|
|
|
chip = get_chip_info(sdev->pdata);
|
|
if (!chip) {
|
|
dev_err(sdev->dev, "error: no such device supported, chip id:%x\n",
|
|
pci->device);
|
|
ret = -EIO;
|
|
goto err;
|
|
}
|
|
|
|
hdev = devm_kzalloc(sdev->dev, sizeof(*hdev), GFP_KERNEL);
|
|
if (!hdev)
|
|
return -ENOMEM;
|
|
sdev->pdata->hw_pdata = hdev;
|
|
hdev->desc = chip;
|
|
|
|
hdev->dmic_dev = platform_device_register_data(sdev->dev, "dmic-codec",
|
|
PLATFORM_DEVID_NONE,
|
|
NULL, 0);
|
|
if (IS_ERR(hdev->dmic_dev)) {
|
|
dev_err(sdev->dev, "error: failed to create DMIC device\n");
|
|
return PTR_ERR(hdev->dmic_dev);
|
|
}
|
|
|
|
/*
|
|
* use position update IPC if either it is forced
|
|
* or we don't have other choice
|
|
*/
|
|
#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_FORCE_IPC_POSITION)
|
|
hdev->no_ipc_position = 0;
|
|
#else
|
|
hdev->no_ipc_position = sof_ops(sdev)->pcm_pointer ? 1 : 0;
|
|
#endif
|
|
|
|
/* set up HDA base */
|
|
bus = sof_to_bus(sdev);
|
|
ret = hda_init(sdev);
|
|
if (ret < 0)
|
|
goto hdac_bus_unmap;
|
|
|
|
/* DSP base */
|
|
#if IS_ENABLED(CONFIG_PCI)
|
|
sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR);
|
|
#endif
|
|
if (!sdev->bar[HDA_DSP_BAR]) {
|
|
dev_err(sdev->dev, "error: ioremap error\n");
|
|
ret = -ENXIO;
|
|
goto hdac_bus_unmap;
|
|
}
|
|
|
|
sdev->mmio_bar = HDA_DSP_BAR;
|
|
sdev->mailbox_bar = HDA_DSP_BAR;
|
|
|
|
/* allow 64bit DMA address if supported by H/W */
|
|
if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(64))) {
|
|
dev_dbg(sdev->dev, "DMA mask is 64 bit\n");
|
|
dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(64));
|
|
} else {
|
|
dev_dbg(sdev->dev, "DMA mask is 32 bit\n");
|
|
dma_set_mask(&pci->dev, DMA_BIT_MASK(32));
|
|
dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32));
|
|
}
|
|
|
|
/* init streams */
|
|
ret = hda_dsp_stream_init(sdev);
|
|
if (ret < 0) {
|
|
dev_err(sdev->dev, "error: failed to init streams\n");
|
|
/*
|
|
* not all errors are due to memory issues, but trying
|
|
* to free everything does not harm
|
|
*/
|
|
goto free_streams;
|
|
}
|
|
|
|
/*
|
|
* register our IRQ
|
|
* let's try to enable msi firstly
|
|
* if it fails, use legacy interrupt mode
|
|
* TODO: support msi multiple vectors
|
|
*/
|
|
if (hda_use_msi && pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI) > 0) {
|
|
dev_info(sdev->dev, "use msi interrupt mode\n");
|
|
sdev->ipc_irq = pci_irq_vector(pci, 0);
|
|
/* initialised to "false" by kzalloc() */
|
|
sdev->msi_enabled = true;
|
|
}
|
|
|
|
if (!sdev->msi_enabled) {
|
|
dev_info(sdev->dev, "use legacy interrupt mode\n");
|
|
/*
|
|
* in IO-APIC mode, hda->irq and ipc_irq are using the same
|
|
* irq number of pci->irq
|
|
*/
|
|
sdev->ipc_irq = pci->irq;
|
|
}
|
|
|
|
dev_dbg(sdev->dev, "using IPC IRQ %d\n", sdev->ipc_irq);
|
|
ret = request_threaded_irq(sdev->ipc_irq, hda_dsp_interrupt_handler,
|
|
hda_dsp_interrupt_thread,
|
|
IRQF_SHARED, "AudioDSP", sdev);
|
|
if (ret < 0) {
|
|
dev_err(sdev->dev, "error: failed to register IPC IRQ %d\n",
|
|
sdev->ipc_irq);
|
|
goto free_irq_vector;
|
|
}
|
|
|
|
pci_set_master(pci);
|
|
synchronize_irq(pci->irq);
|
|
|
|
/*
|
|
* clear TCSEL to clear playback on some HD Audio
|
|
* codecs. PCI TCSEL is defined in the Intel manuals.
|
|
*/
|
|
snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0);
|
|
|
|
/* init HDA capabilities */
|
|
ret = hda_init_caps(sdev);
|
|
if (ret < 0)
|
|
goto free_ipc_irq;
|
|
|
|
/* enable ppcap interrupt */
|
|
hda_dsp_ctrl_ppcap_enable(sdev, true);
|
|
hda_dsp_ctrl_ppcap_int_enable(sdev, true);
|
|
|
|
/* set default mailbox offset for FW ready message */
|
|
sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET;
|
|
|
|
INIT_DELAYED_WORK(&hdev->d0i3_work, hda_dsp_d0i3_work);
|
|
|
|
return 0;
|
|
|
|
free_ipc_irq:
|
|
free_irq(sdev->ipc_irq, sdev);
|
|
free_irq_vector:
|
|
if (sdev->msi_enabled)
|
|
pci_free_irq_vectors(pci);
|
|
free_streams:
|
|
hda_dsp_stream_free(sdev);
|
|
/* dsp_unmap: not currently used */
|
|
iounmap(sdev->bar[HDA_DSP_BAR]);
|
|
hdac_bus_unmap:
|
|
iounmap(bus->remap_addr);
|
|
hda_codec_i915_exit(sdev);
|
|
err:
|
|
return ret;
|
|
}
|
|
|
|
int hda_dsp_remove(struct snd_sof_dev *sdev)
|
|
{
|
|
struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
|
|
struct hdac_bus *bus = sof_to_bus(sdev);
|
|
struct pci_dev *pci = to_pci_dev(sdev->dev);
|
|
const struct sof_intel_dsp_desc *chip = hda->desc;
|
|
|
|
/* cancel any attempt for DSP D0I3 */
|
|
cancel_delayed_work_sync(&hda->d0i3_work);
|
|
|
|
#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
|
|
/* codec removal, invoke bus_device_remove */
|
|
snd_hdac_ext_bus_device_remove(bus);
|
|
#endif
|
|
|
|
hda_sdw_exit(sdev);
|
|
|
|
if (!IS_ERR_OR_NULL(hda->dmic_dev))
|
|
platform_device_unregister(hda->dmic_dev);
|
|
|
|
/* disable DSP IRQ */
|
|
snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
|
|
SOF_HDA_PPCTL_PIE, 0);
|
|
|
|
/* disable CIE and GIE interrupts */
|
|
snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,
|
|
SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0);
|
|
|
|
/* disable cores */
|
|
if (chip)
|
|
hda_dsp_core_reset_power_down(sdev, chip->cores_mask);
|
|
|
|
/* disable DSP */
|
|
snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
|
|
SOF_HDA_PPCTL_GPROCEN, 0);
|
|
|
|
free_irq(sdev->ipc_irq, sdev);
|
|
if (sdev->msi_enabled)
|
|
pci_free_irq_vectors(pci);
|
|
|
|
hda_dsp_stream_free(sdev);
|
|
#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
|
|
snd_hdac_link_free_all(bus);
|
|
#endif
|
|
|
|
iounmap(sdev->bar[HDA_DSP_BAR]);
|
|
iounmap(bus->remap_addr);
|
|
|
|
#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
|
|
snd_hdac_ext_bus_exit(bus);
|
|
#endif
|
|
hda_codec_i915_exit(sdev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
|
|
static int hda_generic_machine_select(struct snd_sof_dev *sdev)
|
|
{
|
|
struct hdac_bus *bus = sof_to_bus(sdev);
|
|
struct snd_soc_acpi_mach_params *mach_params;
|
|
struct snd_soc_acpi_mach *hda_mach;
|
|
struct snd_sof_pdata *pdata = sdev->pdata;
|
|
const char *tplg_filename;
|
|
const char *idisp_str;
|
|
const char *dmic_str;
|
|
int dmic_num = 0;
|
|
int codec_num = 0;
|
|
int i;
|
|
|
|
/* codec detection */
|
|
if (!bus->codec_mask) {
|
|
dev_info(bus->dev, "no hda codecs found!\n");
|
|
} else {
|
|
dev_info(bus->dev, "hda codecs found, mask %lx\n",
|
|
bus->codec_mask);
|
|
|
|
for (i = 0; i < HDA_MAX_CODECS; i++) {
|
|
if (bus->codec_mask & (1 << i))
|
|
codec_num++;
|
|
}
|
|
|
|
/*
|
|
* If no machine driver is found, then:
|
|
*
|
|
* generic hda machine driver can handle:
|
|
* - one HDMI codec, and/or
|
|
* - one external HDAudio codec
|
|
*/
|
|
if (!pdata->machine && codec_num <= 2) {
|
|
hda_mach = snd_soc_acpi_intel_hda_machines;
|
|
|
|
/* topology: use the info from hda_machines */
|
|
pdata->tplg_filename =
|
|
hda_mach->sof_tplg_filename;
|
|
|
|
dev_info(bus->dev, "using HDA machine driver %s now\n",
|
|
hda_mach->drv_name);
|
|
|
|
if (codec_num == 1 && HDA_IDISP_CODEC(bus->codec_mask))
|
|
idisp_str = "-idisp";
|
|
else
|
|
idisp_str = "";
|
|
|
|
/* first check NHLT for DMICs */
|
|
dmic_num = check_nhlt_dmic(sdev);
|
|
|
|
/* allow for module parameter override */
|
|
if (hda_dmic_num != -1)
|
|
dmic_num = hda_dmic_num;
|
|
|
|
switch (dmic_num) {
|
|
case 2:
|
|
dmic_str = "-2ch";
|
|
break;
|
|
case 4:
|
|
dmic_str = "-4ch";
|
|
break;
|
|
default:
|
|
dmic_num = 0;
|
|
dmic_str = "";
|
|
break;
|
|
}
|
|
|
|
tplg_filename = pdata->tplg_filename;
|
|
tplg_filename = fixup_tplg_name(sdev, tplg_filename,
|
|
idisp_str, dmic_str);
|
|
if (!tplg_filename)
|
|
return -EINVAL;
|
|
|
|
dev_info(bus->dev,
|
|
"DMICs detected in NHLT tables: %d\n",
|
|
dmic_num);
|
|
|
|
pdata->machine = hda_mach;
|
|
pdata->tplg_filename = tplg_filename;
|
|
}
|
|
}
|
|
|
|
/* used by hda machine driver to create dai links */
|
|
if (pdata->machine) {
|
|
mach_params = (struct snd_soc_acpi_mach_params *)
|
|
&pdata->machine->mach_params;
|
|
mach_params->codec_mask = bus->codec_mask;
|
|
mach_params->common_hdmi_codec_drv = hda_codec_use_common_hdmi;
|
|
mach_params->dmic_num = dmic_num;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#else
|
|
static int hda_generic_machine_select(struct snd_sof_dev *sdev)
|
|
{
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
#if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
|
|
/* Check if all Slaves defined on the link can be found */
|
|
static bool link_slaves_found(struct snd_sof_dev *sdev,
|
|
const struct snd_soc_acpi_link_adr *link,
|
|
struct sdw_intel_ctx *sdw)
|
|
{
|
|
struct hdac_bus *bus = sof_to_bus(sdev);
|
|
struct sdw_intel_slave_id *ids = sdw->ids;
|
|
int num_slaves = sdw->num_slaves;
|
|
unsigned int part_id, link_id, unique_id, mfg_id;
|
|
int i, j;
|
|
|
|
for (i = 0; i < link->num_adr; i++) {
|
|
u64 adr = link->adr_d[i].adr;
|
|
|
|
mfg_id = SDW_MFG_ID(adr);
|
|
part_id = SDW_PART_ID(adr);
|
|
link_id = SDW_DISCO_LINK_ID(adr);
|
|
for (j = 0; j < num_slaves; j++) {
|
|
if (ids[j].link_id != link_id ||
|
|
ids[j].id.part_id != part_id ||
|
|
ids[j].id.mfg_id != mfg_id)
|
|
continue;
|
|
/*
|
|
* we have to check unique id
|
|
* if there is more than one
|
|
* Slave on the link
|
|
*/
|
|
unique_id = SDW_UNIQUE_ID(adr);
|
|
if (link->num_adr == 1 ||
|
|
ids[j].id.unique_id == SDW_IGNORED_UNIQUE_ID ||
|
|
ids[j].id.unique_id == unique_id) {
|
|
dev_dbg(bus->dev,
|
|
"found %x at link %d\n",
|
|
part_id, link_id);
|
|
break;
|
|
}
|
|
}
|
|
if (j == num_slaves) {
|
|
dev_dbg(bus->dev,
|
|
"Slave %x not found\n",
|
|
part_id);
|
|
return false;
|
|
}
|
|
}
|
|
return true;
|
|
}
|
|
|
|
static int hda_sdw_machine_select(struct snd_sof_dev *sdev)
|
|
{
|
|
struct snd_sof_pdata *pdata = sdev->pdata;
|
|
const struct snd_soc_acpi_link_adr *link;
|
|
struct hdac_bus *bus = sof_to_bus(sdev);
|
|
struct snd_soc_acpi_mach *mach;
|
|
struct sof_intel_hda_dev *hdev;
|
|
u32 link_mask;
|
|
int i;
|
|
|
|
hdev = pdata->hw_pdata;
|
|
link_mask = hdev->info.link_mask;
|
|
|
|
/*
|
|
* Select SoundWire machine driver if needed using the
|
|
* alternate tables. This case deals with SoundWire-only
|
|
* machines, for mixed cases with I2C/I2S the detection relies
|
|
* on the HID list.
|
|
*/
|
|
if (link_mask && !pdata->machine) {
|
|
for (mach = pdata->desc->alt_machines;
|
|
mach && mach->link_mask; mach++) {
|
|
if (mach->link_mask != link_mask)
|
|
continue;
|
|
|
|
/* No need to match adr if there is no links defined */
|
|
if (!mach->links)
|
|
break;
|
|
|
|
link = mach->links;
|
|
for (i = 0; i < hdev->info.count && link->num_adr;
|
|
i++, link++) {
|
|
/*
|
|
* Try next machine if any expected Slaves
|
|
* are not found on this link.
|
|
*/
|
|
if (!link_slaves_found(sdev, link, hdev->sdw))
|
|
break;
|
|
}
|
|
/* Found if all Slaves are checked */
|
|
if (i == hdev->info.count || !link->num_adr)
|
|
break;
|
|
}
|
|
if (mach && mach->link_mask) {
|
|
dev_dbg(bus->dev,
|
|
"SoundWire machine driver %s topology %s\n",
|
|
mach->drv_name,
|
|
mach->sof_tplg_filename);
|
|
pdata->machine = mach;
|
|
mach->mach_params.links = mach->links;
|
|
mach->mach_params.link_mask = mach->link_mask;
|
|
mach->mach_params.platform = dev_name(sdev->dev);
|
|
pdata->fw_filename = mach->sof_fw_filename;
|
|
pdata->tplg_filename = mach->sof_tplg_filename;
|
|
} else {
|
|
dev_info(sdev->dev,
|
|
"No SoundWire machine driver found\n");
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#else
|
|
static int hda_sdw_machine_select(struct snd_sof_dev *sdev)
|
|
{
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
void hda_set_mach_params(const struct snd_soc_acpi_mach *mach,
|
|
struct device *dev)
|
|
{
|
|
struct snd_soc_acpi_mach_params *mach_params;
|
|
|
|
mach_params = (struct snd_soc_acpi_mach_params *)&mach->mach_params;
|
|
mach_params->platform = dev_name(dev);
|
|
}
|
|
|
|
void hda_machine_select(struct snd_sof_dev *sdev)
|
|
{
|
|
struct snd_sof_pdata *sof_pdata = sdev->pdata;
|
|
const struct sof_dev_desc *desc = sof_pdata->desc;
|
|
struct snd_soc_acpi_mach *mach;
|
|
|
|
mach = snd_soc_acpi_find_machine(desc->machines);
|
|
if (mach) {
|
|
sof_pdata->tplg_filename = mach->sof_tplg_filename;
|
|
sof_pdata->machine = mach;
|
|
|
|
if (mach->link_mask) {
|
|
mach->mach_params.links = mach->links;
|
|
mach->mach_params.link_mask = mach->link_mask;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* If I2S fails, try SoundWire
|
|
*/
|
|
hda_sdw_machine_select(sdev);
|
|
|
|
/*
|
|
* Choose HDA generic machine driver if mach is NULL.
|
|
* Otherwise, set certain mach params.
|
|
*/
|
|
hda_generic_machine_select(sdev);
|
|
|
|
if (!sof_pdata->machine)
|
|
dev_warn(sdev->dev, "warning: No matching ASoC machine driver found\n");
|
|
}
|
|
|
|
MODULE_LICENSE("Dual BSD/GPL");
|
|
MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC);
|
|
MODULE_IMPORT_NS(SND_SOC_SOF_HDA_AUDIO_CODEC_I915);
|
|
MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA);
|