820 lines
21 KiB
C
820 lines
21 KiB
C
/* multi_arith.h: multi-precision integer arithmetic functions, needed
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to do extended-precision floating point.
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(c) 1998 David Huggins-Daines.
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Somewhat based on arch/alpha/math-emu/ieee-math.c, which is (c)
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David Mosberger-Tang.
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You may copy, modify, and redistribute this file under the terms of
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the GNU General Public License, version 2, or any later version, at
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your convenience. */
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/* Note:
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These are not general multi-precision math routines. Rather, they
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implement the subset of integer arithmetic that we need in order to
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multiply, divide, and normalize 128-bit unsigned mantissae. */
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#ifndef MULTI_ARITH_H
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#define MULTI_ARITH_H
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#if 0 /* old code... */
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/* Unsigned only, because we don't need signs to multiply and divide. */
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typedef unsigned int int128[4];
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/* Word order */
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enum {
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MSW128,
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NMSW128,
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NLSW128,
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LSW128
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};
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/* big-endian */
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#define LO_WORD(ll) (((unsigned int *) &ll)[1])
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#define HI_WORD(ll) (((unsigned int *) &ll)[0])
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/* Convenience functions to stuff various integer values into int128s */
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static inline void zero128(int128 a)
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{
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a[LSW128] = a[NLSW128] = a[NMSW128] = a[MSW128] = 0;
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}
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/* Human-readable word order in the arguments */
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static inline void set128(unsigned int i3, unsigned int i2, unsigned int i1,
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unsigned int i0, int128 a)
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{
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a[LSW128] = i0;
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a[NLSW128] = i1;
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a[NMSW128] = i2;
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a[MSW128] = i3;
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}
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/* Convenience functions (for testing as well) */
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static inline void int64_to_128(unsigned long long src, int128 dest)
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{
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dest[LSW128] = (unsigned int) src;
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dest[NLSW128] = src >> 32;
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dest[NMSW128] = dest[MSW128] = 0;
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}
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static inline void int128_to_64(const int128 src, unsigned long long *dest)
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{
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*dest = src[LSW128] | (long long) src[NLSW128] << 32;
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}
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static inline void put_i128(const int128 a)
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{
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printk("%08x %08x %08x %08x\n", a[MSW128], a[NMSW128],
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a[NLSW128], a[LSW128]);
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}
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/* Internal shifters:
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Note that these are only good for 0 < count < 32.
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*/
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static inline void _lsl128(unsigned int count, int128 a)
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{
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a[MSW128] = (a[MSW128] << count) | (a[NMSW128] >> (32 - count));
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a[NMSW128] = (a[NMSW128] << count) | (a[NLSW128] >> (32 - count));
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a[NLSW128] = (a[NLSW128] << count) | (a[LSW128] >> (32 - count));
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a[LSW128] <<= count;
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}
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static inline void _lsr128(unsigned int count, int128 a)
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{
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a[LSW128] = (a[LSW128] >> count) | (a[NLSW128] << (32 - count));
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a[NLSW128] = (a[NLSW128] >> count) | (a[NMSW128] << (32 - count));
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a[NMSW128] = (a[NMSW128] >> count) | (a[MSW128] << (32 - count));
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a[MSW128] >>= count;
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}
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/* Should be faster, one would hope */
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static inline void lslone128(int128 a)
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{
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asm volatile ("lsl.l #1,%0\n"
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"roxl.l #1,%1\n"
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"roxl.l #1,%2\n"
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"roxl.l #1,%3\n"
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:
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"=d" (a[LSW128]),
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"=d"(a[NLSW128]),
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"=d"(a[NMSW128]),
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"=d"(a[MSW128])
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:
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"0"(a[LSW128]),
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"1"(a[NLSW128]),
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"2"(a[NMSW128]),
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"3"(a[MSW128]));
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}
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static inline void lsrone128(int128 a)
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{
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asm volatile ("lsr.l #1,%0\n"
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"roxr.l #1,%1\n"
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"roxr.l #1,%2\n"
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"roxr.l #1,%3\n"
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:
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"=d" (a[MSW128]),
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"=d"(a[NMSW128]),
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"=d"(a[NLSW128]),
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"=d"(a[LSW128])
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:
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"0"(a[MSW128]),
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"1"(a[NMSW128]),
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"2"(a[NLSW128]),
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"3"(a[LSW128]));
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}
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/* Generalized 128-bit shifters:
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These bit-shift to a multiple of 32, then move whole longwords. */
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static inline void lsl128(unsigned int count, int128 a)
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{
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int wordcount, i;
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if (count % 32)
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_lsl128(count % 32, a);
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if (0 == (wordcount = count / 32))
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return;
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/* argh, gak, endian-sensitive */
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for (i = 0; i < 4 - wordcount; i++) {
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a[i] = a[i + wordcount];
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}
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for (i = 3; i >= 4 - wordcount; --i) {
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a[i] = 0;
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}
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}
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static inline void lsr128(unsigned int count, int128 a)
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{
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int wordcount, i;
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if (count % 32)
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_lsr128(count % 32, a);
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if (0 == (wordcount = count / 32))
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return;
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for (i = 3; i >= wordcount; --i) {
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a[i] = a[i - wordcount];
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}
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for (i = 0; i < wordcount; i++) {
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a[i] = 0;
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}
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}
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static inline int orl128(int a, int128 b)
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{
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b[LSW128] |= a;
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}
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static inline int btsthi128(const int128 a)
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{
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return a[MSW128] & 0x80000000;
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}
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/* test bits (numbered from 0 = LSB) up to and including "top" */
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static inline int bftestlo128(int top, const int128 a)
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{
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int r = 0;
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if (top > 31)
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r |= a[LSW128];
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if (top > 63)
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r |= a[NLSW128];
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if (top > 95)
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r |= a[NMSW128];
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r |= a[3 - (top / 32)] & ((1 << (top % 32 + 1)) - 1);
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return (r != 0);
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}
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/* Aargh. We need these because GCC is broken */
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/* FIXME: do them in assembly, for goodness' sake! */
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static inline void mask64(int pos, unsigned long long *mask)
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{
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*mask = 0;
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if (pos < 32) {
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LO_WORD(*mask) = (1 << pos) - 1;
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return;
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}
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LO_WORD(*mask) = -1;
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HI_WORD(*mask) = (1 << (pos - 32)) - 1;
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}
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static inline void bset64(int pos, unsigned long long *dest)
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{
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/* This conditional will be optimized away. Thanks, GCC! */
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if (pos < 32)
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asm volatile ("bset %1,%0":"=m"
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(LO_WORD(*dest)):"id"(pos));
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else
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asm volatile ("bset %1,%0":"=m"
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(HI_WORD(*dest)):"id"(pos - 32));
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}
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static inline int btst64(int pos, unsigned long long dest)
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{
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if (pos < 32)
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return (0 != (LO_WORD(dest) & (1 << pos)));
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else
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return (0 != (HI_WORD(dest) & (1 << (pos - 32))));
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}
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static inline void lsl64(int count, unsigned long long *dest)
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{
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if (count < 32) {
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HI_WORD(*dest) = (HI_WORD(*dest) << count)
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| (LO_WORD(*dest) >> count);
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LO_WORD(*dest) <<= count;
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return;
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}
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count -= 32;
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HI_WORD(*dest) = LO_WORD(*dest) << count;
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LO_WORD(*dest) = 0;
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}
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static inline void lsr64(int count, unsigned long long *dest)
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{
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if (count < 32) {
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LO_WORD(*dest) = (LO_WORD(*dest) >> count)
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| (HI_WORD(*dest) << (32 - count));
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HI_WORD(*dest) >>= count;
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return;
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}
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count -= 32;
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LO_WORD(*dest) = HI_WORD(*dest) >> count;
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HI_WORD(*dest) = 0;
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}
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#endif
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static inline void fp_denormalize(struct fp_ext *reg, unsigned int cnt)
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{
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reg->exp += cnt;
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switch (cnt) {
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case 0 ... 8:
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reg->lowmant = reg->mant.m32[1] << (8 - cnt);
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reg->mant.m32[1] = (reg->mant.m32[1] >> cnt) |
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(reg->mant.m32[0] << (32 - cnt));
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reg->mant.m32[0] = reg->mant.m32[0] >> cnt;
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break;
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case 9 ... 32:
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reg->lowmant = reg->mant.m32[1] >> (cnt - 8);
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if (reg->mant.m32[1] << (40 - cnt))
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reg->lowmant |= 1;
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reg->mant.m32[1] = (reg->mant.m32[1] >> cnt) |
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(reg->mant.m32[0] << (32 - cnt));
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reg->mant.m32[0] = reg->mant.m32[0] >> cnt;
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break;
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case 33 ... 39:
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asm volatile ("bfextu %1{%2,#8},%0" : "=d" (reg->lowmant)
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: "m" (reg->mant.m32[0]), "d" (64 - cnt));
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if (reg->mant.m32[1] << (40 - cnt))
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reg->lowmant |= 1;
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reg->mant.m32[1] = reg->mant.m32[0] >> (cnt - 32);
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reg->mant.m32[0] = 0;
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break;
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case 40 ... 71:
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reg->lowmant = reg->mant.m32[0] >> (cnt - 40);
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if ((reg->mant.m32[0] << (72 - cnt)) || reg->mant.m32[1])
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reg->lowmant |= 1;
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reg->mant.m32[1] = reg->mant.m32[0] >> (cnt - 32);
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reg->mant.m32[0] = 0;
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break;
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default:
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reg->lowmant = reg->mant.m32[0] || reg->mant.m32[1];
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reg->mant.m32[0] = 0;
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reg->mant.m32[1] = 0;
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break;
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}
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}
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static inline int fp_overnormalize(struct fp_ext *reg)
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{
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int shift;
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if (reg->mant.m32[0]) {
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asm ("bfffo %1{#0,#32},%0" : "=d" (shift) : "dm" (reg->mant.m32[0]));
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reg->mant.m32[0] = (reg->mant.m32[0] << shift) | (reg->mant.m32[1] >> (32 - shift));
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reg->mant.m32[1] = (reg->mant.m32[1] << shift);
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} else {
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asm ("bfffo %1{#0,#32},%0" : "=d" (shift) : "dm" (reg->mant.m32[1]));
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reg->mant.m32[0] = (reg->mant.m32[1] << shift);
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reg->mant.m32[1] = 0;
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shift += 32;
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}
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return shift;
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}
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static inline int fp_addmant(struct fp_ext *dest, struct fp_ext *src)
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{
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int carry;
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/* we assume here, gcc only insert move and a clr instr */
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asm volatile ("add.b %1,%0" : "=d,g" (dest->lowmant)
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: "g,d" (src->lowmant), "0,0" (dest->lowmant));
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asm volatile ("addx.l %1,%0" : "=d" (dest->mant.m32[1])
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: "d" (src->mant.m32[1]), "0" (dest->mant.m32[1]));
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asm volatile ("addx.l %1,%0" : "=d" (dest->mant.m32[0])
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: "d" (src->mant.m32[0]), "0" (dest->mant.m32[0]));
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asm volatile ("addx.l %0,%0" : "=d" (carry) : "0" (0));
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return carry;
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}
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static inline int fp_addcarry(struct fp_ext *reg)
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{
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if (++reg->exp == 0x7fff) {
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if (reg->mant.m64)
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fp_set_sr(FPSR_EXC_INEX2);
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reg->mant.m64 = 0;
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fp_set_sr(FPSR_EXC_OVFL);
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return 0;
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}
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reg->lowmant = (reg->mant.m32[1] << 7) | (reg->lowmant ? 1 : 0);
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reg->mant.m32[1] = (reg->mant.m32[1] >> 1) |
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(reg->mant.m32[0] << 31);
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reg->mant.m32[0] = (reg->mant.m32[0] >> 1) | 0x80000000;
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return 1;
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}
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static inline void fp_submant(struct fp_ext *dest, struct fp_ext *src1,
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struct fp_ext *src2)
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{
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/* we assume here, gcc only insert move and a clr instr */
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asm volatile ("sub.b %1,%0" : "=d,g" (dest->lowmant)
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: "g,d" (src2->lowmant), "0,0" (src1->lowmant));
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asm volatile ("subx.l %1,%0" : "=d" (dest->mant.m32[1])
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: "d" (src2->mant.m32[1]), "0" (src1->mant.m32[1]));
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asm volatile ("subx.l %1,%0" : "=d" (dest->mant.m32[0])
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: "d" (src2->mant.m32[0]), "0" (src1->mant.m32[0]));
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}
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#define fp_mul64(desth, destl, src1, src2) ({ \
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asm ("mulu.l %2,%1:%0" : "=d" (destl), "=d" (desth) \
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: "dm" (src1), "0" (src2)); \
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})
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#define fp_div64(quot, rem, srch, srcl, div) \
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asm ("divu.l %2,%1:%0" : "=d" (quot), "=d" (rem) \
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: "dm" (div), "1" (srch), "0" (srcl))
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#define fp_add64(dest1, dest2, src1, src2) ({ \
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asm ("add.l %1,%0" : "=d,dm" (dest2) \
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: "dm,d" (src2), "0,0" (dest2)); \
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asm ("addx.l %1,%0" : "=d" (dest1) \
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: "d" (src1), "0" (dest1)); \
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})
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#define fp_addx96(dest, src) ({ \
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/* we assume here, gcc only insert move and a clr instr */ \
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asm volatile ("add.l %1,%0" : "=d,g" (dest->m32[2]) \
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: "g,d" (temp.m32[1]), "0,0" (dest->m32[2])); \
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asm volatile ("addx.l %1,%0" : "=d" (dest->m32[1]) \
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: "d" (temp.m32[0]), "0" (dest->m32[1])); \
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asm volatile ("addx.l %1,%0" : "=d" (dest->m32[0]) \
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: "d" (0), "0" (dest->m32[0])); \
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})
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#define fp_sub64(dest, src) ({ \
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asm ("sub.l %1,%0" : "=d,dm" (dest.m32[1]) \
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: "dm,d" (src.m32[1]), "0,0" (dest.m32[1])); \
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asm ("subx.l %1,%0" : "=d" (dest.m32[0]) \
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: "d" (src.m32[0]), "0" (dest.m32[0])); \
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})
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#define fp_sub96c(dest, srch, srcm, srcl) ({ \
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char carry; \
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asm ("sub.l %1,%0" : "=d,dm" (dest.m32[2]) \
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: "dm,d" (srcl), "0,0" (dest.m32[2])); \
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asm ("subx.l %1,%0" : "=d" (dest.m32[1]) \
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: "d" (srcm), "0" (dest.m32[1])); \
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asm ("subx.l %2,%1; scs %0" : "=d" (carry), "=d" (dest.m32[0]) \
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: "d" (srch), "1" (dest.m32[0])); \
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carry; \
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})
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static inline void fp_multiplymant(union fp_mant128 *dest, struct fp_ext *src1,
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struct fp_ext *src2)
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{
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union fp_mant64 temp;
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fp_mul64(dest->m32[0], dest->m32[1], src1->mant.m32[0], src2->mant.m32[0]);
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fp_mul64(dest->m32[2], dest->m32[3], src1->mant.m32[1], src2->mant.m32[1]);
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fp_mul64(temp.m32[0], temp.m32[1], src1->mant.m32[0], src2->mant.m32[1]);
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fp_addx96(dest, temp);
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fp_mul64(temp.m32[0], temp.m32[1], src1->mant.m32[1], src2->mant.m32[0]);
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fp_addx96(dest, temp);
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}
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static inline void fp_dividemant(union fp_mant128 *dest, struct fp_ext *src,
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struct fp_ext *div)
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{
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union fp_mant128 tmp;
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union fp_mant64 tmp64;
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unsigned long *mantp = dest->m32;
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unsigned long fix, rem, first, dummy;
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int i;
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/* the algorithm below requires dest to be smaller than div,
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but both have the high bit set */
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if (src->mant.m64 >= div->mant.m64) {
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fp_sub64(src->mant, div->mant);
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*mantp = 1;
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} else
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*mantp = 0;
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mantp++;
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/* basic idea behind this algorithm: we can't divide two 64bit numbers
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(AB/CD) directly, but we can calculate AB/C0, but this means this
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quotient is off by C0/CD, so we have to multiply the first result
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to fix the result, after that we have nearly the correct result
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and only a few corrections are needed. */
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/* C0/CD can be precalculated, but it's an 64bit division again, but
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we can make it a bit easier, by dividing first through C so we get
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10/1D and now only a single shift and the value fits into 32bit. */
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fix = 0x80000000;
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dummy = div->mant.m32[1] / div->mant.m32[0] + 1;
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dummy = (dummy >> 1) | fix;
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fp_div64(fix, dummy, fix, 0, dummy);
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fix--;
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for (i = 0; i < 3; i++, mantp++) {
|
|
if (src->mant.m32[0] == div->mant.m32[0]) {
|
|
fp_div64(first, rem, 0, src->mant.m32[1], div->mant.m32[0]);
|
|
|
|
fp_mul64(*mantp, dummy, first, fix);
|
|
*mantp += fix;
|
|
} else {
|
|
fp_div64(first, rem, src->mant.m32[0], src->mant.m32[1], div->mant.m32[0]);
|
|
|
|
fp_mul64(*mantp, dummy, first, fix);
|
|
}
|
|
|
|
fp_mul64(tmp.m32[0], tmp.m32[1], div->mant.m32[0], first - *mantp);
|
|
fp_add64(tmp.m32[0], tmp.m32[1], 0, rem);
|
|
tmp.m32[2] = 0;
|
|
|
|
fp_mul64(tmp64.m32[0], tmp64.m32[1], *mantp, div->mant.m32[1]);
|
|
fp_sub96c(tmp, 0, tmp64.m32[0], tmp64.m32[1]);
|
|
|
|
src->mant.m32[0] = tmp.m32[1];
|
|
src->mant.m32[1] = tmp.m32[2];
|
|
|
|
while (!fp_sub96c(tmp, 0, div->mant.m32[0], div->mant.m32[1])) {
|
|
src->mant.m32[0] = tmp.m32[1];
|
|
src->mant.m32[1] = tmp.m32[2];
|
|
*mantp += 1;
|
|
}
|
|
}
|
|
}
|
|
|
|
#if 0
|
|
static inline unsigned int fp_fls128(union fp_mant128 *src)
|
|
{
|
|
unsigned long data;
|
|
unsigned int res, off;
|
|
|
|
if ((data = src->m32[0]))
|
|
off = 0;
|
|
else if ((data = src->m32[1]))
|
|
off = 32;
|
|
else if ((data = src->m32[2]))
|
|
off = 64;
|
|
else if ((data = src->m32[3]))
|
|
off = 96;
|
|
else
|
|
return 128;
|
|
|
|
asm ("bfffo %1{#0,#32},%0" : "=d" (res) : "dm" (data));
|
|
return res + off;
|
|
}
|
|
|
|
static inline void fp_shiftmant128(union fp_mant128 *src, int shift)
|
|
{
|
|
unsigned long sticky;
|
|
|
|
switch (shift) {
|
|
case 0:
|
|
return;
|
|
case 1:
|
|
asm volatile ("lsl.l #1,%0"
|
|
: "=d" (src->m32[3]) : "0" (src->m32[3]));
|
|
asm volatile ("roxl.l #1,%0"
|
|
: "=d" (src->m32[2]) : "0" (src->m32[2]));
|
|
asm volatile ("roxl.l #1,%0"
|
|
: "=d" (src->m32[1]) : "0" (src->m32[1]));
|
|
asm volatile ("roxl.l #1,%0"
|
|
: "=d" (src->m32[0]) : "0" (src->m32[0]));
|
|
return;
|
|
case 2 ... 31:
|
|
src->m32[0] = (src->m32[0] << shift) | (src->m32[1] >> (32 - shift));
|
|
src->m32[1] = (src->m32[1] << shift) | (src->m32[2] >> (32 - shift));
|
|
src->m32[2] = (src->m32[2] << shift) | (src->m32[3] >> (32 - shift));
|
|
src->m32[3] = (src->m32[3] << shift);
|
|
return;
|
|
case 32 ... 63:
|
|
shift -= 32;
|
|
src->m32[0] = (src->m32[1] << shift) | (src->m32[2] >> (32 - shift));
|
|
src->m32[1] = (src->m32[2] << shift) | (src->m32[3] >> (32 - shift));
|
|
src->m32[2] = (src->m32[3] << shift);
|
|
src->m32[3] = 0;
|
|
return;
|
|
case 64 ... 95:
|
|
shift -= 64;
|
|
src->m32[0] = (src->m32[2] << shift) | (src->m32[3] >> (32 - shift));
|
|
src->m32[1] = (src->m32[3] << shift);
|
|
src->m32[2] = src->m32[3] = 0;
|
|
return;
|
|
case 96 ... 127:
|
|
shift -= 96;
|
|
src->m32[0] = (src->m32[3] << shift);
|
|
src->m32[1] = src->m32[2] = src->m32[3] = 0;
|
|
return;
|
|
case -31 ... -1:
|
|
shift = -shift;
|
|
sticky = 0;
|
|
if (src->m32[3] << (32 - shift))
|
|
sticky = 1;
|
|
src->m32[3] = (src->m32[3] >> shift) | (src->m32[2] << (32 - shift)) | sticky;
|
|
src->m32[2] = (src->m32[2] >> shift) | (src->m32[1] << (32 - shift));
|
|
src->m32[1] = (src->m32[1] >> shift) | (src->m32[0] << (32 - shift));
|
|
src->m32[0] = (src->m32[0] >> shift);
|
|
return;
|
|
case -63 ... -32:
|
|
shift = -shift - 32;
|
|
sticky = 0;
|
|
if ((src->m32[2] << (32 - shift)) || src->m32[3])
|
|
sticky = 1;
|
|
src->m32[3] = (src->m32[2] >> shift) | (src->m32[1] << (32 - shift)) | sticky;
|
|
src->m32[2] = (src->m32[1] >> shift) | (src->m32[0] << (32 - shift));
|
|
src->m32[1] = (src->m32[0] >> shift);
|
|
src->m32[0] = 0;
|
|
return;
|
|
case -95 ... -64:
|
|
shift = -shift - 64;
|
|
sticky = 0;
|
|
if ((src->m32[1] << (32 - shift)) || src->m32[2] || src->m32[3])
|
|
sticky = 1;
|
|
src->m32[3] = (src->m32[1] >> shift) | (src->m32[0] << (32 - shift)) | sticky;
|
|
src->m32[2] = (src->m32[0] >> shift);
|
|
src->m32[1] = src->m32[0] = 0;
|
|
return;
|
|
case -127 ... -96:
|
|
shift = -shift - 96;
|
|
sticky = 0;
|
|
if ((src->m32[0] << (32 - shift)) || src->m32[1] || src->m32[2] || src->m32[3])
|
|
sticky = 1;
|
|
src->m32[3] = (src->m32[0] >> shift) | sticky;
|
|
src->m32[2] = src->m32[1] = src->m32[0] = 0;
|
|
return;
|
|
}
|
|
|
|
if (shift < 0 && (src->m32[0] || src->m32[1] || src->m32[2] || src->m32[3]))
|
|
src->m32[3] = 1;
|
|
else
|
|
src->m32[3] = 0;
|
|
src->m32[2] = 0;
|
|
src->m32[1] = 0;
|
|
src->m32[0] = 0;
|
|
}
|
|
#endif
|
|
|
|
static inline void fp_putmant128(struct fp_ext *dest, union fp_mant128 *src,
|
|
int shift)
|
|
{
|
|
unsigned long tmp;
|
|
|
|
switch (shift) {
|
|
case 0:
|
|
dest->mant.m64 = src->m64[0];
|
|
dest->lowmant = src->m32[2] >> 24;
|
|
if (src->m32[3] || (src->m32[2] << 8))
|
|
dest->lowmant |= 1;
|
|
break;
|
|
case 1:
|
|
asm volatile ("lsl.l #1,%0"
|
|
: "=d" (tmp) : "0" (src->m32[2]));
|
|
asm volatile ("roxl.l #1,%0"
|
|
: "=d" (dest->mant.m32[1]) : "0" (src->m32[1]));
|
|
asm volatile ("roxl.l #1,%0"
|
|
: "=d" (dest->mant.m32[0]) : "0" (src->m32[0]));
|
|
dest->lowmant = tmp >> 24;
|
|
if (src->m32[3] || (tmp << 8))
|
|
dest->lowmant |= 1;
|
|
break;
|
|
case 31:
|
|
asm volatile ("lsr.l #1,%1; roxr.l #1,%0"
|
|
: "=d" (dest->mant.m32[0])
|
|
: "d" (src->m32[0]), "0" (src->m32[1]));
|
|
asm volatile ("roxr.l #1,%0"
|
|
: "=d" (dest->mant.m32[1]) : "0" (src->m32[2]));
|
|
asm volatile ("roxr.l #1,%0"
|
|
: "=d" (tmp) : "0" (src->m32[3]));
|
|
dest->lowmant = tmp >> 24;
|
|
if (src->m32[3] << 7)
|
|
dest->lowmant |= 1;
|
|
break;
|
|
case 32:
|
|
dest->mant.m32[0] = src->m32[1];
|
|
dest->mant.m32[1] = src->m32[2];
|
|
dest->lowmant = src->m32[3] >> 24;
|
|
if (src->m32[3] << 8)
|
|
dest->lowmant |= 1;
|
|
break;
|
|
}
|
|
}
|
|
|
|
#if 0 /* old code... */
|
|
static inline int fls(unsigned int a)
|
|
{
|
|
int r;
|
|
|
|
asm volatile ("bfffo %1{#0,#32},%0"
|
|
: "=d" (r) : "md" (a));
|
|
return r;
|
|
}
|
|
|
|
/* fls = "find last set" (cf. ffs(3)) */
|
|
static inline int fls128(const int128 a)
|
|
{
|
|
if (a[MSW128])
|
|
return fls(a[MSW128]);
|
|
if (a[NMSW128])
|
|
return fls(a[NMSW128]) + 32;
|
|
/* XXX: it probably never gets beyond this point in actual
|
|
use, but that's indicative of a more general problem in the
|
|
algorithm (i.e. as per the actual 68881 implementation, we
|
|
really only need at most 67 bits of precision [plus
|
|
overflow]) so I'm not going to fix it. */
|
|
if (a[NLSW128])
|
|
return fls(a[NLSW128]) + 64;
|
|
if (a[LSW128])
|
|
return fls(a[LSW128]) + 96;
|
|
else
|
|
return -1;
|
|
}
|
|
|
|
static inline int zerop128(const int128 a)
|
|
{
|
|
return !(a[LSW128] | a[NLSW128] | a[NMSW128] | a[MSW128]);
|
|
}
|
|
|
|
static inline int nonzerop128(const int128 a)
|
|
{
|
|
return (a[LSW128] | a[NLSW128] | a[NMSW128] | a[MSW128]);
|
|
}
|
|
|
|
/* Addition and subtraction */
|
|
/* Do these in "pure" assembly, because "extended" asm is unmanageable
|
|
here */
|
|
static inline void add128(const int128 a, int128 b)
|
|
{
|
|
/* rotating carry flags */
|
|
unsigned int carry[2];
|
|
|
|
carry[0] = a[LSW128] > (0xffffffff - b[LSW128]);
|
|
b[LSW128] += a[LSW128];
|
|
|
|
carry[1] = a[NLSW128] > (0xffffffff - b[NLSW128] - carry[0]);
|
|
b[NLSW128] = a[NLSW128] + b[NLSW128] + carry[0];
|
|
|
|
carry[0] = a[NMSW128] > (0xffffffff - b[NMSW128] - carry[1]);
|
|
b[NMSW128] = a[NMSW128] + b[NMSW128] + carry[1];
|
|
|
|
b[MSW128] = a[MSW128] + b[MSW128] + carry[0];
|
|
}
|
|
|
|
/* Note: assembler semantics: "b -= a" */
|
|
static inline void sub128(const int128 a, int128 b)
|
|
{
|
|
/* rotating borrow flags */
|
|
unsigned int borrow[2];
|
|
|
|
borrow[0] = b[LSW128] < a[LSW128];
|
|
b[LSW128] -= a[LSW128];
|
|
|
|
borrow[1] = b[NLSW128] < a[NLSW128] + borrow[0];
|
|
b[NLSW128] = b[NLSW128] - a[NLSW128] - borrow[0];
|
|
|
|
borrow[0] = b[NMSW128] < a[NMSW128] + borrow[1];
|
|
b[NMSW128] = b[NMSW128] - a[NMSW128] - borrow[1];
|
|
|
|
b[MSW128] = b[MSW128] - a[MSW128] - borrow[0];
|
|
}
|
|
|
|
/* Poor man's 64-bit expanding multiply */
|
|
static inline void mul64(unsigned long long a, unsigned long long b, int128 c)
|
|
{
|
|
unsigned long long acc;
|
|
int128 acc128;
|
|
|
|
zero128(acc128);
|
|
zero128(c);
|
|
|
|
/* first the low words */
|
|
if (LO_WORD(a) && LO_WORD(b)) {
|
|
acc = (long long) LO_WORD(a) * LO_WORD(b);
|
|
c[NLSW128] = HI_WORD(acc);
|
|
c[LSW128] = LO_WORD(acc);
|
|
}
|
|
/* Next the high words */
|
|
if (HI_WORD(a) && HI_WORD(b)) {
|
|
acc = (long long) HI_WORD(a) * HI_WORD(b);
|
|
c[MSW128] = HI_WORD(acc);
|
|
c[NMSW128] = LO_WORD(acc);
|
|
}
|
|
/* The middle words */
|
|
if (LO_WORD(a) && HI_WORD(b)) {
|
|
acc = (long long) LO_WORD(a) * HI_WORD(b);
|
|
acc128[NMSW128] = HI_WORD(acc);
|
|
acc128[NLSW128] = LO_WORD(acc);
|
|
add128(acc128, c);
|
|
}
|
|
/* The first and last words */
|
|
if (HI_WORD(a) && LO_WORD(b)) {
|
|
acc = (long long) HI_WORD(a) * LO_WORD(b);
|
|
acc128[NMSW128] = HI_WORD(acc);
|
|
acc128[NLSW128] = LO_WORD(acc);
|
|
add128(acc128, c);
|
|
}
|
|
}
|
|
|
|
/* Note: unsigned */
|
|
static inline int cmp128(int128 a, int128 b)
|
|
{
|
|
if (a[MSW128] < b[MSW128])
|
|
return -1;
|
|
if (a[MSW128] > b[MSW128])
|
|
return 1;
|
|
if (a[NMSW128] < b[NMSW128])
|
|
return -1;
|
|
if (a[NMSW128] > b[NMSW128])
|
|
return 1;
|
|
if (a[NLSW128] < b[NLSW128])
|
|
return -1;
|
|
if (a[NLSW128] > b[NLSW128])
|
|
return 1;
|
|
|
|
return (signed) a[LSW128] - b[LSW128];
|
|
}
|
|
|
|
inline void div128(int128 a, int128 b, int128 c)
|
|
{
|
|
int128 mask;
|
|
|
|
/* Algorithm:
|
|
|
|
Shift the divisor until it's at least as big as the
|
|
dividend, keeping track of the position to which we've
|
|
shifted it, i.e. the power of 2 which we've multiplied it
|
|
by.
|
|
|
|
Then, for this power of 2 (the mask), and every one smaller
|
|
than it, subtract the mask from the dividend and add it to
|
|
the quotient until the dividend is smaller than the raised
|
|
divisor. At this point, divide the dividend and the mask
|
|
by 2 (i.e. shift one place to the right). Lather, rinse,
|
|
and repeat, until there are no more powers of 2 left. */
|
|
|
|
/* FIXME: needless to say, there's room for improvement here too. */
|
|
|
|
/* Shift up */
|
|
/* XXX: since it just has to be "at least as big", we can
|
|
probably eliminate this horribly wasteful loop. I will
|
|
have to prove this first, though */
|
|
set128(0, 0, 0, 1, mask);
|
|
while (cmp128(b, a) < 0 && !btsthi128(b)) {
|
|
lslone128(b);
|
|
lslone128(mask);
|
|
}
|
|
|
|
/* Shift down */
|
|
zero128(c);
|
|
do {
|
|
if (cmp128(a, b) >= 0) {
|
|
sub128(b, a);
|
|
add128(mask, c);
|
|
}
|
|
lsrone128(mask);
|
|
lsrone128(b);
|
|
} while (nonzerop128(mask));
|
|
|
|
/* The remainder is in a... */
|
|
}
|
|
#endif
|
|
|
|
#endif /* MULTI_ARITH_H */
|