666 lines
16 KiB
C
666 lines
16 KiB
C
/*
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* rcar_du_kms.c -- R-Car Display Unit Mode Setting
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*
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* Copyright (C) 2013-2015 Renesas Electronics Corporation
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*
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* Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <drm/drmP.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <drm/drm_gem_cma_helper.h>
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#include <linux/of_graph.h>
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#include <linux/wait.h>
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#include "rcar_du_crtc.h"
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#include "rcar_du_drv.h"
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#include "rcar_du_encoder.h"
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#include "rcar_du_kms.h"
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#include "rcar_du_lvdsenc.h"
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#include "rcar_du_regs.h"
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#include "rcar_du_vsp.h"
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/* -----------------------------------------------------------------------------
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* Format helpers
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*/
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static const struct rcar_du_format_info rcar_du_format_infos[] = {
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{
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.fourcc = DRM_FORMAT_RGB565,
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.bpp = 16,
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.planes = 1,
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.pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_ARGB1555,
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.bpp = 16,
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.planes = 1,
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.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_XRGB1555,
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.bpp = 16,
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.planes = 1,
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.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_XRGB8888,
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.bpp = 32,
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.planes = 1,
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.pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
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.edf = PnDDCR4_EDF_RGB888,
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}, {
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.fourcc = DRM_FORMAT_ARGB8888,
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.bpp = 32,
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.planes = 1,
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.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
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.edf = PnDDCR4_EDF_ARGB8888,
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}, {
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.fourcc = DRM_FORMAT_UYVY,
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.bpp = 16,
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.planes = 1,
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.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_YUYV,
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.bpp = 16,
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.planes = 1,
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.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_NV12,
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.bpp = 12,
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.planes = 2,
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.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_NV21,
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.bpp = 12,
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.planes = 2,
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.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_NV16,
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.bpp = 16,
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.planes = 2,
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.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
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.edf = PnDDCR4_EDF_NONE,
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},
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/* The following formats are not supported on Gen2 and thus have no
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* associated .pnmr or .edf settings.
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*/
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{
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.fourcc = DRM_FORMAT_NV61,
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.bpp = 16,
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.planes = 2,
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}, {
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.fourcc = DRM_FORMAT_YUV420,
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.bpp = 12,
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.planes = 3,
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}, {
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.fourcc = DRM_FORMAT_YVU420,
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.bpp = 12,
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.planes = 3,
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}, {
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.fourcc = DRM_FORMAT_YUV422,
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.bpp = 16,
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.planes = 3,
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}, {
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.fourcc = DRM_FORMAT_YVU422,
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.bpp = 16,
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.planes = 3,
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}, {
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.fourcc = DRM_FORMAT_YUV444,
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.bpp = 24,
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.planes = 3,
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}, {
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.fourcc = DRM_FORMAT_YVU444,
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.bpp = 24,
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.planes = 3,
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},
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};
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const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) {
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if (rcar_du_format_infos[i].fourcc == fourcc)
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return &rcar_du_format_infos[i];
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}
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return NULL;
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}
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/* -----------------------------------------------------------------------------
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* Frame buffer
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*/
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int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
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struct drm_mode_create_dumb *args)
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{
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struct rcar_du_device *rcdu = dev->dev_private;
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unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
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unsigned int align;
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/* The R8A7779 DU requires a 16 pixels pitch alignment as documented,
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* but the R8A7790 DU seems to require a 128 bytes pitch alignment.
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*/
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if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
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align = 128;
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else
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align = 16 * args->bpp / 8;
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args->pitch = roundup(min_pitch, align);
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return drm_gem_cma_dumb_create_internal(file, dev, args);
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}
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static struct drm_framebuffer *
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rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
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const struct drm_mode_fb_cmd2 *mode_cmd)
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{
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struct rcar_du_device *rcdu = dev->dev_private;
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const struct rcar_du_format_info *format;
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unsigned int max_pitch;
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unsigned int align;
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unsigned int bpp;
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unsigned int i;
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format = rcar_du_format_info(mode_cmd->pixel_format);
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if (format == NULL) {
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dev_dbg(dev->dev, "unsupported pixel format %08x\n",
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mode_cmd->pixel_format);
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return ERR_PTR(-EINVAL);
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}
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/*
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* The pitch and alignment constraints are expressed in pixels on the
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* hardware side and in bytes in the DRM API.
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*/
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bpp = format->planes == 1 ? format->bpp / 8 : 1;
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max_pitch = 4096 * bpp;
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if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
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align = 128;
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else
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align = 16 * bpp;
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if (mode_cmd->pitches[0] & (align - 1) ||
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mode_cmd->pitches[0] >= max_pitch) {
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dev_dbg(dev->dev, "invalid pitch value %u\n",
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mode_cmd->pitches[0]);
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return ERR_PTR(-EINVAL);
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}
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for (i = 1; i < format->planes; ++i) {
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if (mode_cmd->pitches[i] != mode_cmd->pitches[0]) {
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dev_dbg(dev->dev,
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"luma and chroma pitches do not match\n");
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return ERR_PTR(-EINVAL);
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}
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}
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return drm_fb_cma_create(dev, file_priv, mode_cmd);
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}
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static void rcar_du_output_poll_changed(struct drm_device *dev)
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{
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struct rcar_du_device *rcdu = dev->dev_private;
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drm_fbdev_cma_hotplug_event(rcdu->fbdev);
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}
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/* -----------------------------------------------------------------------------
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* Atomic Check and Update
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*/
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static int rcar_du_atomic_check(struct drm_device *dev,
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struct drm_atomic_state *state)
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{
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struct rcar_du_device *rcdu = dev->dev_private;
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int ret;
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ret = drm_atomic_helper_check(dev, state);
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if (ret < 0)
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return ret;
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if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE))
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return 0;
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return rcar_du_atomic_check_planes(dev, state);
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}
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struct rcar_du_commit {
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struct work_struct work;
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struct drm_device *dev;
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struct drm_atomic_state *state;
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u32 crtcs;
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};
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static void rcar_du_atomic_complete(struct rcar_du_commit *commit)
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{
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struct drm_device *dev = commit->dev;
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struct rcar_du_device *rcdu = dev->dev_private;
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struct drm_atomic_state *old_state = commit->state;
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/* Apply the atomic update. */
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drm_atomic_helper_commit_modeset_disables(dev, old_state);
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drm_atomic_helper_commit_modeset_enables(dev, old_state);
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drm_atomic_helper_commit_planes(dev, old_state, true);
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drm_atomic_helper_wait_for_vblanks(dev, old_state);
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drm_atomic_helper_cleanup_planes(dev, old_state);
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drm_atomic_state_free(old_state);
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/* Complete the commit, wake up any waiter. */
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spin_lock(&rcdu->commit.wait.lock);
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rcdu->commit.pending &= ~commit->crtcs;
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wake_up_all_locked(&rcdu->commit.wait);
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spin_unlock(&rcdu->commit.wait.lock);
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kfree(commit);
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}
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static void rcar_du_atomic_work(struct work_struct *work)
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{
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struct rcar_du_commit *commit =
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container_of(work, struct rcar_du_commit, work);
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rcar_du_atomic_complete(commit);
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}
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static int rcar_du_atomic_commit(struct drm_device *dev,
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struct drm_atomic_state *state,
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bool nonblock)
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{
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struct rcar_du_device *rcdu = dev->dev_private;
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struct rcar_du_commit *commit;
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unsigned int i;
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int ret;
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ret = drm_atomic_helper_prepare_planes(dev, state);
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if (ret)
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return ret;
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/* Allocate the commit object. */
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commit = kzalloc(sizeof(*commit), GFP_KERNEL);
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if (commit == NULL) {
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ret = -ENOMEM;
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goto error;
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}
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INIT_WORK(&commit->work, rcar_du_atomic_work);
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commit->dev = dev;
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commit->state = state;
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/* Wait until all affected CRTCs have completed previous commits and
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* mark them as pending.
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*/
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for (i = 0; i < dev->mode_config.num_crtc; ++i) {
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if (state->crtcs[i])
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commit->crtcs |= 1 << drm_crtc_index(state->crtcs[i]);
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}
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spin_lock(&rcdu->commit.wait.lock);
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ret = wait_event_interruptible_locked(rcdu->commit.wait,
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!(rcdu->commit.pending & commit->crtcs));
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if (ret == 0)
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rcdu->commit.pending |= commit->crtcs;
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spin_unlock(&rcdu->commit.wait.lock);
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if (ret) {
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kfree(commit);
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goto error;
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}
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/* Swap the state, this is the point of no return. */
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drm_atomic_helper_swap_state(dev, state);
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if (nonblock)
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schedule_work(&commit->work);
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else
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rcar_du_atomic_complete(commit);
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return 0;
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error:
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drm_atomic_helper_cleanup_planes(dev, state);
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return ret;
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}
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/* -----------------------------------------------------------------------------
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* Initialization
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*/
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static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
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.fb_create = rcar_du_fb_create,
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.output_poll_changed = rcar_du_output_poll_changed,
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.atomic_check = rcar_du_atomic_check,
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.atomic_commit = rcar_du_atomic_commit,
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};
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static int rcar_du_encoders_init_one(struct rcar_du_device *rcdu,
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enum rcar_du_output output,
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struct of_endpoint *ep)
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{
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static const struct {
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const char *compatible;
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enum rcar_du_encoder_type type;
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} encoders[] = {
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{ "adi,adv7123", RCAR_DU_ENCODER_VGA },
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{ "adi,adv7511w", RCAR_DU_ENCODER_HDMI },
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{ "thine,thc63lvdm83d", RCAR_DU_ENCODER_LVDS },
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};
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enum rcar_du_encoder_type enc_type = RCAR_DU_ENCODER_NONE;
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struct device_node *connector = NULL;
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struct device_node *encoder = NULL;
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struct device_node *ep_node = NULL;
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struct device_node *entity_ep_node;
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struct device_node *entity;
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int ret;
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/*
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* Locate the connected entity and infer its type from the number of
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* endpoints.
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*/
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entity = of_graph_get_remote_port_parent(ep->local_node);
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if (!entity) {
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dev_dbg(rcdu->dev, "unconnected endpoint %s, skipping\n",
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ep->local_node->full_name);
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return -ENODEV;
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}
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entity_ep_node = of_parse_phandle(ep->local_node, "remote-endpoint", 0);
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for_each_endpoint_of_node(entity, ep_node) {
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if (ep_node == entity_ep_node)
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continue;
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/*
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* We've found one endpoint other than the input, this must
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* be an encoder. Locate the connector.
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*/
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encoder = entity;
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connector = of_graph_get_remote_port_parent(ep_node);
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of_node_put(ep_node);
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if (!connector) {
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dev_warn(rcdu->dev,
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"no connector for encoder %s, skipping\n",
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encoder->full_name);
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of_node_put(entity_ep_node);
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of_node_put(encoder);
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return -ENODEV;
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}
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break;
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}
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of_node_put(entity_ep_node);
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if (encoder) {
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/*
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* If an encoder has been found, get its type based on its
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* compatible string.
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*/
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(encoders); ++i) {
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if (of_device_is_compatible(encoder,
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encoders[i].compatible)) {
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enc_type = encoders[i].type;
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break;
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}
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}
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if (i == ARRAY_SIZE(encoders)) {
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dev_warn(rcdu->dev,
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"unknown encoder type for %s, skipping\n",
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encoder->full_name);
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of_node_put(encoder);
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of_node_put(connector);
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return -EINVAL;
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}
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} else {
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/*
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* If no encoder has been found the entity must be the
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* connector.
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*/
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connector = entity;
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}
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ret = rcar_du_encoder_init(rcdu, enc_type, output, encoder, connector);
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of_node_put(encoder);
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of_node_put(connector);
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if (ret && ret != -EPROBE_DEFER)
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dev_warn(rcdu->dev,
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"failed to initialize encoder %s (%d), skipping\n",
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encoder->full_name, ret);
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return ret;
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}
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static int rcar_du_encoders_init(struct rcar_du_device *rcdu)
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{
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struct device_node *np = rcdu->dev->of_node;
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struct device_node *ep_node;
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unsigned int num_encoders = 0;
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/*
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* Iterate over the endpoints and create one encoder for each output
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* pipeline.
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*/
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for_each_endpoint_of_node(np, ep_node) {
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enum rcar_du_output output;
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struct of_endpoint ep;
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unsigned int i;
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int ret;
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ret = of_graph_parse_endpoint(ep_node, &ep);
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if (ret < 0) {
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of_node_put(ep_node);
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return ret;
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}
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/* Find the output route corresponding to the port number. */
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for (i = 0; i < RCAR_DU_OUTPUT_MAX; ++i) {
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if (rcdu->info->routes[i].possible_crtcs &&
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rcdu->info->routes[i].port == ep.port) {
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output = i;
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break;
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}
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}
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if (i == RCAR_DU_OUTPUT_MAX) {
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dev_warn(rcdu->dev,
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"port %u references unexisting output, skipping\n",
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ep.port);
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continue;
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}
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/* Process the output pipeline. */
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ret = rcar_du_encoders_init_one(rcdu, output, &ep);
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if (ret < 0) {
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if (ret == -EPROBE_DEFER) {
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of_node_put(ep_node);
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return ret;
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}
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continue;
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}
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num_encoders++;
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}
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return num_encoders;
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}
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static int rcar_du_properties_init(struct rcar_du_device *rcdu)
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{
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rcdu->props.alpha =
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drm_property_create_range(rcdu->ddev, 0, "alpha", 0, 255);
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if (rcdu->props.alpha == NULL)
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return -ENOMEM;
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/* The color key is expressed as an RGB888 triplet stored in a 32-bit
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* integer in XRGB8888 format. Bit 24 is used as a flag to disable (0)
|
|
* or enable source color keying (1).
|
|
*/
|
|
rcdu->props.colorkey =
|
|
drm_property_create_range(rcdu->ddev, 0, "colorkey",
|
|
0, 0x01ffffff);
|
|
if (rcdu->props.colorkey == NULL)
|
|
return -ENOMEM;
|
|
|
|
rcdu->props.zpos =
|
|
drm_property_create_range(rcdu->ddev, 0, "zpos", 1, 7);
|
|
if (rcdu->props.zpos == NULL)
|
|
return -ENOMEM;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int rcar_du_modeset_init(struct rcar_du_device *rcdu)
|
|
{
|
|
static const unsigned int mmio_offsets[] = {
|
|
DU0_REG_OFFSET, DU2_REG_OFFSET
|
|
};
|
|
|
|
struct drm_device *dev = rcdu->ddev;
|
|
struct drm_encoder *encoder;
|
|
struct drm_fbdev_cma *fbdev;
|
|
unsigned int num_encoders;
|
|
unsigned int num_groups;
|
|
unsigned int i;
|
|
int ret;
|
|
|
|
drm_mode_config_init(dev);
|
|
|
|
dev->mode_config.min_width = 0;
|
|
dev->mode_config.min_height = 0;
|
|
dev->mode_config.max_width = 4095;
|
|
dev->mode_config.max_height = 2047;
|
|
dev->mode_config.funcs = &rcar_du_mode_config_funcs;
|
|
|
|
rcdu->num_crtcs = rcdu->info->num_crtcs;
|
|
|
|
ret = rcar_du_properties_init(rcdu);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/* Initialize the groups. */
|
|
num_groups = DIV_ROUND_UP(rcdu->num_crtcs, 2);
|
|
|
|
for (i = 0; i < num_groups; ++i) {
|
|
struct rcar_du_group *rgrp = &rcdu->groups[i];
|
|
|
|
mutex_init(&rgrp->lock);
|
|
|
|
rgrp->dev = rcdu;
|
|
rgrp->mmio_offset = mmio_offsets[i];
|
|
rgrp->index = i;
|
|
rgrp->num_crtcs = min(rcdu->num_crtcs - 2 * i, 2U);
|
|
|
|
/* If we have more than one CRTCs in this group pre-associate
|
|
* the low-order planes with CRTC 0 and the high-order planes
|
|
* with CRTC 1 to minimize flicker occurring when the
|
|
* association is changed.
|
|
*/
|
|
rgrp->dptsr_planes = rgrp->num_crtcs > 1
|
|
? (rcdu->info->gen >= 3 ? 0x04 : 0xf0)
|
|
: 0;
|
|
|
|
if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) {
|
|
ret = rcar_du_planes_init(rgrp);
|
|
if (ret < 0)
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
/* Initialize the compositors. */
|
|
if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) {
|
|
for (i = 0; i < rcdu->num_crtcs; ++i) {
|
|
struct rcar_du_vsp *vsp = &rcdu->vsps[i];
|
|
|
|
vsp->index = i;
|
|
vsp->dev = rcdu;
|
|
rcdu->crtcs[i].vsp = vsp;
|
|
|
|
ret = rcar_du_vsp_init(vsp);
|
|
if (ret < 0)
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
/* Create the CRTCs. */
|
|
for (i = 0; i < rcdu->num_crtcs; ++i) {
|
|
struct rcar_du_group *rgrp = &rcdu->groups[i / 2];
|
|
|
|
ret = rcar_du_crtc_create(rgrp, i);
|
|
if (ret < 0)
|
|
return ret;
|
|
}
|
|
|
|
/* Initialize the encoders. */
|
|
ret = rcar_du_lvdsenc_init(rcdu);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = rcar_du_encoders_init(rcdu);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
if (ret == 0) {
|
|
dev_err(rcdu->dev, "error: no encoder could be initialized\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
num_encoders = ret;
|
|
|
|
/* Set the possible CRTCs and possible clones. There's always at least
|
|
* one way for all encoders to clone each other, set all bits in the
|
|
* possible clones field.
|
|
*/
|
|
list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
|
|
struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
|
|
const struct rcar_du_output_routing *route =
|
|
&rcdu->info->routes[renc->output];
|
|
|
|
encoder->possible_crtcs = route->possible_crtcs;
|
|
encoder->possible_clones = (1 << num_encoders) - 1;
|
|
}
|
|
|
|
drm_mode_config_reset(dev);
|
|
|
|
drm_kms_helper_poll_init(dev);
|
|
|
|
if (dev->mode_config.num_connector) {
|
|
fbdev = drm_fbdev_cma_init(dev, 32, dev->mode_config.num_crtc,
|
|
dev->mode_config.num_connector);
|
|
if (IS_ERR(fbdev))
|
|
return PTR_ERR(fbdev);
|
|
|
|
rcdu->fbdev = fbdev;
|
|
} else {
|
|
dev_info(rcdu->dev,
|
|
"no connector found, disabling fbdev emulation\n");
|
|
}
|
|
|
|
return 0;
|
|
}
|