287 lines
6.8 KiB
C
287 lines
6.8 KiB
C
/*
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* Copyright (C) 2013-2014 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* Copyright (c) 2014 The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "adreno_gpu.h"
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#define ANY_ID 0xff
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bool hang_debug = false;
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MODULE_PARM_DESC(hang_debug, "Dump registers when hang is detected (can be slow!)");
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module_param_named(hang_debug, hang_debug, bool, 0600);
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static const struct adreno_info gpulist[] = {
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{
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.rev = ADRENO_REV(3, 0, 5, ANY_ID),
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.revn = 305,
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.name = "A305",
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.pm4fw = "a300_pm4.fw",
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.pfpfw = "a300_pfp.fw",
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.gmem = SZ_256K,
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.init = a3xx_gpu_init,
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}, {
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.rev = ADRENO_REV(3, 0, 6, 0),
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.revn = 307, /* because a305c is revn==306 */
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.name = "A306",
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.pm4fw = "a300_pm4.fw",
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.pfpfw = "a300_pfp.fw",
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.gmem = SZ_128K,
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.init = a3xx_gpu_init,
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}, {
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.rev = ADRENO_REV(3, 2, ANY_ID, ANY_ID),
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.revn = 320,
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.name = "A320",
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.pm4fw = "a300_pm4.fw",
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.pfpfw = "a300_pfp.fw",
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.gmem = SZ_512K,
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.init = a3xx_gpu_init,
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}, {
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.rev = ADRENO_REV(3, 3, 0, ANY_ID),
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.revn = 330,
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.name = "A330",
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.pm4fw = "a330_pm4.fw",
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.pfpfw = "a330_pfp.fw",
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.gmem = SZ_1M,
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.init = a3xx_gpu_init,
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}, {
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.rev = ADRENO_REV(4, 2, 0, ANY_ID),
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.revn = 420,
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.name = "A420",
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.pm4fw = "a420_pm4.fw",
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.pfpfw = "a420_pfp.fw",
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.gmem = (SZ_1M + SZ_512K),
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.init = a4xx_gpu_init,
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}, {
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.rev = ADRENO_REV(4, 3, 0, ANY_ID),
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.revn = 430,
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.name = "A430",
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.pm4fw = "a420_pm4.fw",
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.pfpfw = "a420_pfp.fw",
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.gmem = (SZ_1M + SZ_512K),
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.init = a4xx_gpu_init,
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}, {
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.rev = ADRENO_REV(5, 3, 0, ANY_ID),
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.revn = 530,
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.name = "A530",
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.pm4fw = "a530_pm4.fw",
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.pfpfw = "a530_pfp.fw",
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.gmem = SZ_1M,
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.init = a5xx_gpu_init,
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.gpmufw = "a530v3_gpmu.fw2",
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},
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};
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MODULE_FIRMWARE("a300_pm4.fw");
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MODULE_FIRMWARE("a300_pfp.fw");
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MODULE_FIRMWARE("a330_pm4.fw");
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MODULE_FIRMWARE("a330_pfp.fw");
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MODULE_FIRMWARE("a420_pm4.fw");
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MODULE_FIRMWARE("a420_pfp.fw");
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MODULE_FIRMWARE("a530_fm4.fw");
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MODULE_FIRMWARE("a530_pfp.fw");
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static inline bool _rev_match(uint8_t entry, uint8_t id)
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{
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return (entry == ANY_ID) || (entry == id);
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}
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const struct adreno_info *adreno_info(struct adreno_rev rev)
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{
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int i;
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/* identify gpu: */
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for (i = 0; i < ARRAY_SIZE(gpulist); i++) {
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const struct adreno_info *info = &gpulist[i];
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if (_rev_match(info->rev.core, rev.core) &&
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_rev_match(info->rev.major, rev.major) &&
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_rev_match(info->rev.minor, rev.minor) &&
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_rev_match(info->rev.patchid, rev.patchid))
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return info;
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}
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return NULL;
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}
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struct msm_gpu *adreno_load_gpu(struct drm_device *dev)
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{
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struct msm_drm_private *priv = dev->dev_private;
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struct platform_device *pdev = priv->gpu_pdev;
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struct adreno_platform_config *config;
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struct adreno_rev rev;
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const struct adreno_info *info;
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struct msm_gpu *gpu = NULL;
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if (!pdev) {
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dev_err(dev->dev, "no adreno device\n");
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return NULL;
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}
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config = pdev->dev.platform_data;
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rev = config->rev;
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info = adreno_info(config->rev);
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if (!info) {
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dev_warn(dev->dev, "Unknown GPU revision: %u.%u.%u.%u\n",
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rev.core, rev.major, rev.minor, rev.patchid);
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return NULL;
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}
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DBG("Found GPU: %u.%u.%u.%u", rev.core, rev.major,
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rev.minor, rev.patchid);
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gpu = info->init(dev);
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if (IS_ERR(gpu)) {
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dev_warn(dev->dev, "failed to load adreno gpu\n");
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gpu = NULL;
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/* not fatal */
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}
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if (gpu) {
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int ret;
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mutex_lock(&dev->struct_mutex);
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gpu->funcs->pm_resume(gpu);
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mutex_unlock(&dev->struct_mutex);
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disable_irq(gpu->irq);
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ret = gpu->funcs->hw_init(gpu);
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if (ret) {
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dev_err(dev->dev, "gpu hw init failed: %d\n", ret);
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gpu->funcs->destroy(gpu);
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gpu = NULL;
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} else {
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enable_irq(gpu->irq);
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/* give inactive pm a chance to kick in: */
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msm_gpu_retire(gpu);
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}
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}
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return gpu;
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}
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static void set_gpu_pdev(struct drm_device *dev,
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struct platform_device *pdev)
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{
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struct msm_drm_private *priv = dev->dev_private;
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priv->gpu_pdev = pdev;
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}
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static const struct {
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const char *str;
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uint32_t flag;
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} quirks[] = {
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{ "qcom,gpu-quirk-two-pass-use-wfi", ADRENO_QUIRK_TWO_PASS_USE_WFI },
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{ "qcom,gpu-quirk-fault-detect-mask", ADRENO_QUIRK_FAULT_DETECT_MASK },
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};
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static int adreno_bind(struct device *dev, struct device *master, void *data)
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{
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static struct adreno_platform_config config = {};
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struct device_node *child, *node = dev->of_node;
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u32 val;
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int ret, i;
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ret = of_property_read_u32(node, "qcom,chipid", &val);
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if (ret) {
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dev_err(dev, "could not find chipid: %d\n", ret);
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return ret;
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}
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config.rev = ADRENO_REV((val >> 24) & 0xff,
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(val >> 16) & 0xff, (val >> 8) & 0xff, val & 0xff);
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/* find clock rates: */
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config.fast_rate = 0;
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config.slow_rate = ~0;
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for_each_child_of_node(node, child) {
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if (of_device_is_compatible(child, "qcom,gpu-pwrlevels")) {
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struct device_node *pwrlvl;
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for_each_child_of_node(child, pwrlvl) {
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ret = of_property_read_u32(pwrlvl, "qcom,gpu-freq", &val);
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if (ret) {
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dev_err(dev, "could not find gpu-freq: %d\n", ret);
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return ret;
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}
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config.fast_rate = max(config.fast_rate, val);
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config.slow_rate = min(config.slow_rate, val);
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}
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}
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}
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if (!config.fast_rate) {
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dev_err(dev, "could not find clk rates\n");
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return -ENXIO;
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}
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for (i = 0; i < ARRAY_SIZE(quirks); i++)
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if (of_property_read_bool(node, quirks[i].str))
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config.quirks |= quirks[i].flag;
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dev->platform_data = &config;
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set_gpu_pdev(dev_get_drvdata(master), to_platform_device(dev));
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return 0;
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}
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static void adreno_unbind(struct device *dev, struct device *master,
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void *data)
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{
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set_gpu_pdev(dev_get_drvdata(master), NULL);
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}
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static const struct component_ops a3xx_ops = {
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.bind = adreno_bind,
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.unbind = adreno_unbind,
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};
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static int adreno_probe(struct platform_device *pdev)
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{
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return component_add(&pdev->dev, &a3xx_ops);
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}
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static int adreno_remove(struct platform_device *pdev)
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{
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component_del(&pdev->dev, &a3xx_ops);
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return 0;
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}
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static const struct of_device_id dt_match[] = {
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{ .compatible = "qcom,adreno-3xx" },
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/* for backwards compat w/ downstream kgsl DT files: */
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{ .compatible = "qcom,kgsl-3d0" },
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{}
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};
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static struct platform_driver adreno_driver = {
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.probe = adreno_probe,
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.remove = adreno_remove,
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.driver = {
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.name = "adreno",
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.of_match_table = dt_match,
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},
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};
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void __init adreno_register(void)
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{
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platform_driver_register(&adreno_driver);
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}
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void __exit adreno_unregister(void)
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{
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platform_driver_unregister(&adreno_driver);
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}
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