156 lines
3.9 KiB
C
156 lines
3.9 KiB
C
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Microsemi MIPS SoC reset driver
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*
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* License: Dual MIT/GPL
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* Copyright (c) 2017 Microsemi Corporation
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*/
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/notifier.h>
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#include <linux/mfd/syscon.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/reboot.h>
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#include <linux/regmap.h>
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struct reset_props {
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const char *syscon;
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u32 protect_reg;
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u32 vcore_protect;
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u32 if_si_owner_bit;
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};
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struct ocelot_reset_context {
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void __iomem *base;
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struct regmap *cpu_ctrl;
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const struct reset_props *props;
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struct notifier_block restart_handler;
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};
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#define BIT_OFF_INVALID 32
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#define SOFT_CHIP_RST BIT(0)
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#define ICPU_CFG_CPU_SYSTEM_CTRL_GENERAL_CTRL 0x24
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#define IF_SI_OWNER_MASK GENMASK(1, 0)
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#define IF_SI_OWNER_SISL 0
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#define IF_SI_OWNER_SIBM 1
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#define IF_SI_OWNER_SIMC 2
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static int ocelot_restart_handle(struct notifier_block *this,
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unsigned long mode, void *cmd)
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{
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struct ocelot_reset_context *ctx = container_of(this, struct
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ocelot_reset_context,
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restart_handler);
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u32 if_si_owner_bit = ctx->props->if_si_owner_bit;
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/* Make sure the core is not protected from reset */
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regmap_update_bits(ctx->cpu_ctrl, ctx->props->protect_reg,
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ctx->props->vcore_protect, 0);
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/* Make the SI back to boot mode */
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if (if_si_owner_bit != BIT_OFF_INVALID)
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regmap_update_bits(ctx->cpu_ctrl,
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ICPU_CFG_CPU_SYSTEM_CTRL_GENERAL_CTRL,
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IF_SI_OWNER_MASK << if_si_owner_bit,
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IF_SI_OWNER_SIBM << if_si_owner_bit);
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pr_emerg("Resetting SoC\n");
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writel(SOFT_CHIP_RST, ctx->base);
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pr_emerg("Unable to restart system\n");
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return NOTIFY_DONE;
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}
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static int ocelot_reset_probe(struct platform_device *pdev)
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{
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struct ocelot_reset_context *ctx;
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struct resource *res;
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struct device *dev = &pdev->dev;
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int err;
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ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
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if (!ctx)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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ctx->base = devm_ioremap_resource(dev, res);
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if (IS_ERR(ctx->base))
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return PTR_ERR(ctx->base);
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ctx->props = device_get_match_data(dev);
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ctx->cpu_ctrl = syscon_regmap_lookup_by_compatible(ctx->props->syscon);
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if (IS_ERR(ctx->cpu_ctrl)) {
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dev_err(dev, "No syscon map: %s\n", ctx->props->syscon);
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return PTR_ERR(ctx->cpu_ctrl);
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}
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ctx->restart_handler.notifier_call = ocelot_restart_handle;
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ctx->restart_handler.priority = 192;
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err = register_restart_handler(&ctx->restart_handler);
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if (err)
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dev_err(dev, "can't register restart notifier (err=%d)\n", err);
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return err;
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}
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static const struct reset_props reset_props_jaguar2 = {
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.syscon = "mscc,ocelot-cpu-syscon",
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.protect_reg = 0x20,
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.vcore_protect = BIT(2),
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.if_si_owner_bit = 6,
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};
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static const struct reset_props reset_props_luton = {
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.syscon = "mscc,ocelot-cpu-syscon",
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.protect_reg = 0x20,
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.vcore_protect = BIT(2),
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.if_si_owner_bit = BIT_OFF_INVALID, /* n/a */
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};
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static const struct reset_props reset_props_ocelot = {
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.syscon = "mscc,ocelot-cpu-syscon",
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.protect_reg = 0x20,
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.vcore_protect = BIT(2),
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.if_si_owner_bit = 4,
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};
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static const struct reset_props reset_props_sparx5 = {
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.syscon = "microchip,sparx5-cpu-syscon",
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.protect_reg = 0x84,
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.vcore_protect = BIT(10),
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.if_si_owner_bit = 6,
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};
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static const struct of_device_id ocelot_reset_of_match[] = {
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{
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.compatible = "mscc,jaguar2-chip-reset",
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.data = &reset_props_jaguar2
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}, {
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.compatible = "mscc,luton-chip-reset",
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.data = &reset_props_luton
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}, {
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.compatible = "mscc,ocelot-chip-reset",
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.data = &reset_props_ocelot
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}, {
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.compatible = "microchip,sparx5-chip-reset",
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.data = &reset_props_sparx5
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},
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{ /*sentinel*/ }
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};
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static struct platform_driver ocelot_reset_driver = {
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.probe = ocelot_reset_probe,
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.driver = {
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.name = "ocelot-chip-reset",
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.of_match_table = ocelot_reset_of_match,
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},
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};
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builtin_platform_driver(ocelot_reset_driver);
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