32 lines
725 B
Plaintext
32 lines
725 B
Plaintext
PXA3xx NAND DT bindings
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Required properties:
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- compatible: Should be "marvell,pxa3xx-nand"
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- reg: The register base for the controller
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- interrupts: The interrupt to map
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- #address-cells: Set to <1> if the node includes partitions
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Optional properties:
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- marvell,nand-enable-arbiter: Set to enable the bus arbiter
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- marvell,nand-keep-config: Set to keep the NAND controller config as set
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by the bootloader
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- num-cs: Number of chipselect lines to usw
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Example:
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nand0: nand@43100000 {
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compatible = "marvell,pxa3xx-nand";
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reg = <0x43100000 90>;
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interrupts = <45>;
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#address-cells = <1>;
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marvell,nand-enable-arbiter;
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marvell,nand-keep-config;
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num-cs = <1>;
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/* partitions (optional) */
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};
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