Aneesh Kumar K.V 368ced78e6 powerpc/mm: Switch book3s 64 with 64K page size to 4 level page table ... This is needed so that we can support both hash and radix page table using single kernel. Radix kernel uses a 4 level table. We now use physical address in upper page table tree levels. Even though they are aligned to their size, for the masked bits we use the bit positions as per PowerISA 3.0. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>		2016-03-03 21:18:28 +11:00
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asm	powerpc/mm: Switch book3s 64 with 64K page size to 4 level page table	2016-03-03 21:18:28 +11:00
uapi/asm	powerpc: Fix misspellings in comments.	2016-03-01 19:27:20 +11:00