550 lines
16 KiB
C
550 lines
16 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2018-2020 Broadcom.
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*/
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#ifndef BCM_VK_H
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#define BCM_VK_H
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#include <linux/atomic.h>
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#include <linux/firmware.h>
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#include <linux/irq.h>
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#include <linux/kref.h>
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#include <linux/miscdevice.h>
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#include <linux/mutex.h>
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#include <linux/pci.h>
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#include <linux/poll.h>
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#include <linux/sched/signal.h>
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#include <linux/tty.h>
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#include <linux/uaccess.h>
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#include <uapi/linux/misc/bcm_vk.h>
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#include "bcm_vk_msg.h"
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#define DRV_MODULE_NAME "bcm-vk"
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/*
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* Load Image is completed in two stages:
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*
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* 1) When the VK device boot-up, M7 CPU runs and executes the BootROM.
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* The Secure Boot Loader (SBL) as part of the BootROM will run
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* to open up ITCM for host to push BOOT1 image.
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* SBL will authenticate the image before jumping to BOOT1 image.
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*
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* 2) Because BOOT1 image is a secured image, we also called it the
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* Secure Boot Image (SBI). At second stage, SBI will initialize DDR
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* and wait for host to push BOOT2 image to DDR.
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* SBI will authenticate the image before jumping to BOOT2 image.
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*
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*/
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/* Location of registers of interest in BAR0 */
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/* Request register for Secure Boot Loader (SBL) download */
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#define BAR_CODEPUSH_SBL 0x400
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/* Start of ITCM */
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#define CODEPUSH_BOOT1_ENTRY 0x00400000
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#define CODEPUSH_MASK 0xfffff000
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#define CODEPUSH_BOOTSTART BIT(0)
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/* Boot Status register */
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#define BAR_BOOT_STATUS 0x404
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#define SRAM_OPEN BIT(16)
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#define DDR_OPEN BIT(17)
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/* Firmware loader progress status definitions */
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#define FW_LOADER_ACK_SEND_MORE_DATA BIT(18)
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#define FW_LOADER_ACK_IN_PROGRESS BIT(19)
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#define FW_LOADER_ACK_RCVD_ALL_DATA BIT(20)
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/* Boot1/2 is running in standalone mode */
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#define BOOT_STDALONE_RUNNING BIT(21)
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/* definitions for boot status register */
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#define BOOT_STATE_MASK (0xffffffff & \
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~(FW_LOADER_ACK_SEND_MORE_DATA | \
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FW_LOADER_ACK_IN_PROGRESS | \
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BOOT_STDALONE_RUNNING))
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#define BOOT_ERR_SHIFT 4
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#define BOOT_ERR_MASK (0xf << BOOT_ERR_SHIFT)
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#define BOOT_PROG_MASK 0xf
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#define BROM_STATUS_NOT_RUN 0x2
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#define BROM_NOT_RUN (SRAM_OPEN | BROM_STATUS_NOT_RUN)
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#define BROM_STATUS_COMPLETE 0x6
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#define BROM_RUNNING (SRAM_OPEN | BROM_STATUS_COMPLETE)
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#define BOOT1_STATUS_COMPLETE 0x6
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#define BOOT1_RUNNING (DDR_OPEN | BOOT1_STATUS_COMPLETE)
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#define BOOT2_STATUS_COMPLETE 0x6
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#define BOOT2_RUNNING (FW_LOADER_ACK_RCVD_ALL_DATA | \
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BOOT2_STATUS_COMPLETE)
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/* Boot request for Secure Boot Image (SBI) */
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#define BAR_CODEPUSH_SBI 0x408
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/* 64M mapped to BAR2 */
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#define CODEPUSH_BOOT2_ENTRY 0x60000000
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#define BAR_CARD_STATUS 0x410
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/* CARD_STATUS definitions */
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#define CARD_STATUS_TTYVK0_READY BIT(0)
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#define CARD_STATUS_TTYVK1_READY BIT(1)
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#define BAR_BOOT1_STDALONE_PROGRESS 0x420
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#define BOOT1_STDALONE_SUCCESS (BIT(13) | BIT(14))
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#define BOOT1_STDALONE_PROGRESS_MASK BOOT1_STDALONE_SUCCESS
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#define BAR_METADATA_VERSION 0x440
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#define BAR_OS_UPTIME 0x444
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#define BAR_CHIP_ID 0x448
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#define MAJOR_SOC_REV(_chip_id) (((_chip_id) >> 20) & 0xf)
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#define BAR_CARD_TEMPERATURE 0x45c
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/* defines for all temperature sensor */
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#define BCM_VK_TEMP_FIELD_MASK 0xff
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#define BCM_VK_CPU_TEMP_SHIFT 0
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#define BCM_VK_DDR0_TEMP_SHIFT 8
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#define BCM_VK_DDR1_TEMP_SHIFT 16
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#define BAR_CARD_VOLTAGE 0x460
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/* defines for voltage rail conversion */
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#define BCM_VK_VOLT_RAIL_MASK 0xffff
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#define BCM_VK_3P3_VOLT_REG_SHIFT 16
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#define BAR_CARD_ERR_LOG 0x464
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/* Error log register bit definition - register for error alerts */
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#define ERR_LOG_UECC BIT(0)
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#define ERR_LOG_SSIM_BUSY BIT(1)
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#define ERR_LOG_AFBC_BUSY BIT(2)
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#define ERR_LOG_HIGH_TEMP_ERR BIT(3)
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#define ERR_LOG_WDOG_TIMEOUT BIT(4)
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#define ERR_LOG_SYS_FAULT BIT(5)
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#define ERR_LOG_RAMDUMP BIT(6)
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#define ERR_LOG_COP_WDOG_TIMEOUT BIT(7)
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/* warnings */
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#define ERR_LOG_MEM_ALLOC_FAIL BIT(8)
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#define ERR_LOG_LOW_TEMP_WARN BIT(9)
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#define ERR_LOG_ECC BIT(10)
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#define ERR_LOG_IPC_DWN BIT(11)
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/* Alert bit definitions detectd on host */
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#define ERR_LOG_HOST_INTF_V_FAIL BIT(13)
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#define ERR_LOG_HOST_HB_FAIL BIT(14)
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#define ERR_LOG_HOST_PCIE_DWN BIT(15)
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#define BAR_CARD_ERR_MEM 0x468
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/* defines for mem err, all fields have same width */
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#define BCM_VK_MEM_ERR_FIELD_MASK 0xff
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#define BCM_VK_ECC_MEM_ERR_SHIFT 0
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#define BCM_VK_UECC_MEM_ERR_SHIFT 8
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/* threshold of event occurrence and logs start to come out */
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#define BCM_VK_ECC_THRESHOLD 10
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#define BCM_VK_UECC_THRESHOLD 1
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#define BAR_CARD_PWR_AND_THRE 0x46c
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/* defines for power and temp threshold, all fields have same width */
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#define BCM_VK_PWR_AND_THRE_FIELD_MASK 0xff
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#define BCM_VK_LOW_TEMP_THRE_SHIFT 0
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#define BCM_VK_HIGH_TEMP_THRE_SHIFT 8
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#define BCM_VK_PWR_STATE_SHIFT 16
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#define BAR_CARD_STATIC_INFO 0x470
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#define BAR_INTF_VER 0x47c
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#define BAR_INTF_VER_MAJOR_SHIFT 16
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#define BAR_INTF_VER_MASK 0xffff
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/*
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* major and minor semantic version numbers supported
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* Please update as required on interface changes
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*/
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#define SEMANTIC_MAJOR 1
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#define SEMANTIC_MINOR 0
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/*
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* first door bell reg, ie for queue = 0. Only need the first one, as
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* we will use the queue number to derive the others
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*/
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#define VK_BAR0_REGSEG_DB_BASE 0x484
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#define VK_BAR0_REGSEG_DB_REG_GAP 8 /*
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* DB register gap,
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* DB1 at 0x48c and DB2 at 0x494
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*/
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/* reset register and specific values */
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#define VK_BAR0_RESET_DB_NUM 3
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#define VK_BAR0_RESET_DB_SOFT 0xffffffff
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#define VK_BAR0_RESET_DB_HARD 0xfffffffd
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#define VK_BAR0_RESET_RAMPDUMP 0xa0000000
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#define VK_BAR0_Q_DB_BASE(q_num) (VK_BAR0_REGSEG_DB_BASE + \
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((q_num) * VK_BAR0_REGSEG_DB_REG_GAP))
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#define VK_BAR0_RESET_DB_BASE (VK_BAR0_REGSEG_DB_BASE + \
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(VK_BAR0_RESET_DB_NUM * VK_BAR0_REGSEG_DB_REG_GAP))
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#define BAR_BOOTSRC_SELECT 0xc78
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/* BOOTSRC definitions */
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#define BOOTSRC_SOFT_ENABLE BIT(14)
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/* Card OS Firmware version size */
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#define BAR_FIRMWARE_TAG_SIZE 50
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#define FIRMWARE_STATUS_PRE_INIT_DONE 0x1f
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/* VK MSG_ID defines */
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#define VK_MSG_ID_BITMAP_SIZE 4096
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#define VK_MSG_ID_BITMAP_MASK (VK_MSG_ID_BITMAP_SIZE - 1)
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#define VK_MSG_ID_OVERFLOW 0xffff
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/*
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* BAR1
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*/
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/* BAR1 message q definition */
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/* indicate if msgq ctrl in BAR1 is populated */
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#define VK_BAR1_MSGQ_DEF_RDY 0x60c0
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/* ready marker value for the above location, normal boot2 */
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#define VK_BAR1_MSGQ_RDY_MARKER 0xbeefcafe
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/* ready marker value for the above location, normal boot2 */
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#define VK_BAR1_DIAG_RDY_MARKER 0xdeadcafe
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/* number of msgqs in BAR1 */
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#define VK_BAR1_MSGQ_NR 0x60c4
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/* BAR1 queue control structure offset */
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#define VK_BAR1_MSGQ_CTRL_OFF 0x60c8
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/* BAR1 ucode and boot1 version tag */
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#define VK_BAR1_UCODE_VER_TAG 0x6170
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#define VK_BAR1_BOOT1_VER_TAG 0x61b0
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#define VK_BAR1_VER_TAG_SIZE 64
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/* Memory to hold the DMA buffer memory address allocated for boot2 download */
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#define VK_BAR1_DMA_BUF_OFF_HI 0x61e0
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#define VK_BAR1_DMA_BUF_OFF_LO (VK_BAR1_DMA_BUF_OFF_HI + 4)
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#define VK_BAR1_DMA_BUF_SZ (VK_BAR1_DMA_BUF_OFF_HI + 8)
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/* Scratch memory allocated on host for VK */
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#define VK_BAR1_SCRATCH_OFF_HI 0x61f0
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#define VK_BAR1_SCRATCH_OFF_LO (VK_BAR1_SCRATCH_OFF_HI + 4)
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#define VK_BAR1_SCRATCH_SZ_ADDR (VK_BAR1_SCRATCH_OFF_HI + 8)
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#define VK_BAR1_SCRATCH_DEF_NR_PAGES 32
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/* BAR1 DAUTH info */
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#define VK_BAR1_DAUTH_BASE_ADDR 0x6200
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#define VK_BAR1_DAUTH_STORE_SIZE 0x48
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#define VK_BAR1_DAUTH_VALID_SIZE 0x8
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#define VK_BAR1_DAUTH_MAX 4
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#define VK_BAR1_DAUTH_STORE_ADDR(x) \
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(VK_BAR1_DAUTH_BASE_ADDR + \
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(x) * (VK_BAR1_DAUTH_STORE_SIZE + VK_BAR1_DAUTH_VALID_SIZE))
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#define VK_BAR1_DAUTH_VALID_ADDR(x) \
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(VK_BAR1_DAUTH_STORE_ADDR(x) + VK_BAR1_DAUTH_STORE_SIZE)
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/* BAR1 SOTP AUTH and REVID info */
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#define VK_BAR1_SOTP_REVID_BASE_ADDR 0x6340
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#define VK_BAR1_SOTP_REVID_SIZE 0x10
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#define VK_BAR1_SOTP_REVID_MAX 2
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#define VK_BAR1_SOTP_REVID_ADDR(x) \
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(VK_BAR1_SOTP_REVID_BASE_ADDR + (x) * VK_BAR1_SOTP_REVID_SIZE)
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/* VK device supports a maximum of 3 bars */
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#define MAX_BAR 3
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/* default number of msg blk for inband SGL */
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#define BCM_VK_DEF_IB_SGL_BLK_LEN 16
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#define BCM_VK_IB_SGL_BLK_MAX 24
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enum pci_barno {
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BAR_0 = 0,
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BAR_1,
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BAR_2
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};
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#ifdef CONFIG_BCM_VK_TTY
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#define BCM_VK_NUM_TTY 2
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#else
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#define BCM_VK_NUM_TTY 0
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#endif
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struct bcm_vk_tty {
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struct tty_port port;
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u32 to_offset; /* bar offset to use */
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u32 to_size; /* to VK buffer size */
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u32 wr; /* write offset shadow */
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u32 from_offset; /* bar offset to use */
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u32 from_size; /* from VK buffer size */
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u32 rd; /* read offset shadow */
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pid_t pid;
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bool irq_enabled;
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bool is_opened; /* tracks tty open/close */
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};
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/* VK device max power state, supports 3, full, reduced and low */
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#define MAX_OPP 3
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#define MAX_CARD_INFO_TAG_SIZE 64
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struct bcm_vk_card_info {
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u32 version;
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char os_tag[MAX_CARD_INFO_TAG_SIZE];
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char cmpt_tag[MAX_CARD_INFO_TAG_SIZE];
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u32 cpu_freq_mhz;
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u32 cpu_scale[MAX_OPP];
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u32 ddr_freq_mhz;
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u32 ddr_size_MB;
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u32 video_core_freq_mhz;
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};
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/* DAUTH related info */
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struct bcm_vk_dauth_key {
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char store[VK_BAR1_DAUTH_STORE_SIZE];
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char valid[VK_BAR1_DAUTH_VALID_SIZE];
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};
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struct bcm_vk_dauth_info {
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struct bcm_vk_dauth_key keys[VK_BAR1_DAUTH_MAX];
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};
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/*
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* Control structure of logging messages from the card. This
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* buffer is for logmsg that comes from vk
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*/
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struct bcm_vk_peer_log {
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u32 rd_idx;
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u32 wr_idx;
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u32 buf_size;
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u32 mask;
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char data[];
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};
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/* max buf size allowed */
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#define BCM_VK_PEER_LOG_BUF_MAX SZ_16K
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/* max size per line of peer log */
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#define BCM_VK_PEER_LOG_LINE_MAX 256
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/*
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* single entry for processing type + utilization
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*/
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#define BCM_VK_PROC_TYPE_TAG_LEN 8
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struct bcm_vk_proc_mon_entry_t {
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char tag[BCM_VK_PROC_TYPE_TAG_LEN];
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u32 used;
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u32 max; /**< max capacity */
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};
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/**
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* Structure for run time utilization
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*/
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#define BCM_VK_PROC_MON_MAX 8 /* max entries supported */
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struct bcm_vk_proc_mon_info {
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u32 num; /**< no of entries */
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u32 entry_size; /**< per entry size */
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struct bcm_vk_proc_mon_entry_t entries[BCM_VK_PROC_MON_MAX];
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};
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struct bcm_vk_hb_ctrl {
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struct timer_list timer;
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u32 last_uptime;
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u32 lost_cnt;
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};
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struct bcm_vk_alert {
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u16 flags;
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u16 notfs;
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};
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/* some alert counters that the driver will keep track */
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struct bcm_vk_alert_cnts {
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u16 ecc;
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u16 uecc;
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};
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struct bcm_vk {
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struct pci_dev *pdev;
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void __iomem *bar[MAX_BAR];
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int num_irqs;
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struct bcm_vk_card_info card_info;
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struct bcm_vk_proc_mon_info proc_mon_info;
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struct bcm_vk_dauth_info dauth_info;
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/* mutex to protect the ioctls */
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struct mutex mutex;
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struct miscdevice miscdev;
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int devid; /* dev id allocated */
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#ifdef CONFIG_BCM_VK_TTY
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struct tty_driver *tty_drv;
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struct timer_list serial_timer;
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struct bcm_vk_tty tty[BCM_VK_NUM_TTY];
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struct workqueue_struct *tty_wq_thread;
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struct work_struct tty_wq_work;
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#endif
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/* Reference-counting to handle file operations */
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struct kref kref;
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spinlock_t msg_id_lock; /* Spinlock for msg_id */
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u16 msg_id;
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DECLARE_BITMAP(bmap, VK_MSG_ID_BITMAP_SIZE);
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spinlock_t ctx_lock; /* Spinlock for component context */
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struct bcm_vk_ctx ctx[VK_CMPT_CTX_MAX];
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struct bcm_vk_ht_entry pid_ht[VK_PID_HT_SZ];
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pid_t reset_pid; /* process that issue reset */
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atomic_t msgq_inited; /* indicate if info has been synced with vk */
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struct bcm_vk_msg_chan to_v_msg_chan;
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struct bcm_vk_msg_chan to_h_msg_chan;
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struct workqueue_struct *wq_thread;
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struct work_struct wq_work; /* work queue for deferred job */
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unsigned long wq_offload[1]; /* various flags on wq requested */
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void *tdma_vaddr; /* test dma segment virtual addr */
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dma_addr_t tdma_addr; /* test dma segment bus addr */
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struct notifier_block panic_nb;
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u32 ib_sgl_size; /* size allocated for inband sgl insertion */
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/* heart beat mechanism control structure */
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struct bcm_vk_hb_ctrl hb_ctrl;
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/* house-keeping variable of error logs */
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spinlock_t host_alert_lock; /* protection to access host_alert struct */
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struct bcm_vk_alert host_alert;
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struct bcm_vk_alert peer_alert; /* bits set by the card */
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struct bcm_vk_alert_cnts alert_cnts;
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/* offset of the peer log control in BAR2 */
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u32 peerlog_off;
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struct bcm_vk_peer_log peerlog_info; /* record of peer log info */
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/* offset of processing monitoring info in BAR2 */
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u32 proc_mon_off;
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};
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/* wq offload work items bits definitions */
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enum bcm_vk_wq_offload_flags {
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BCM_VK_WQ_DWNLD_PEND = 0,
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BCM_VK_WQ_DWNLD_AUTO = 1,
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BCM_VK_WQ_NOTF_PEND = 2,
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};
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/* a macro to get an individual field with mask and shift */
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#define BCM_VK_EXTRACT_FIELD(_field, _reg, _mask, _shift) \
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(_field = (((_reg) >> (_shift)) & (_mask)))
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struct bcm_vk_entry {
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const u32 mask;
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const u32 exp_val;
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const char *str;
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};
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/* alerts that could be generated from peer */
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#define BCM_VK_PEER_ERR_NUM 12
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extern struct bcm_vk_entry const bcm_vk_peer_err[BCM_VK_PEER_ERR_NUM];
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/* alerts detected by the host */
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#define BCM_VK_HOST_ERR_NUM 3
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extern struct bcm_vk_entry const bcm_vk_host_err[BCM_VK_HOST_ERR_NUM];
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/*
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* check if PCIe interface is down on read. Use it when it is
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* certain that _val should never be all ones.
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*/
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#define BCM_VK_INTF_IS_DOWN(val) ((val) == 0xffffffff)
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static inline u32 vkread32(struct bcm_vk *vk, enum pci_barno bar, u64 offset)
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{
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return readl(vk->bar[bar] + offset);
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}
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static inline void vkwrite32(struct bcm_vk *vk,
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u32 value,
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enum pci_barno bar,
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u64 offset)
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{
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writel(value, vk->bar[bar] + offset);
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}
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static inline u8 vkread8(struct bcm_vk *vk, enum pci_barno bar, u64 offset)
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{
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return readb(vk->bar[bar] + offset);
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}
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|
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static inline void vkwrite8(struct bcm_vk *vk,
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u8 value,
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enum pci_barno bar,
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|
u64 offset)
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{
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writeb(value, vk->bar[bar] + offset);
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}
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|
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static inline bool bcm_vk_msgq_marker_valid(struct bcm_vk *vk)
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|
{
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u32 rdy_marker = 0;
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u32 fw_status;
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|
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fw_status = vkread32(vk, BAR_0, VK_BAR_FWSTS);
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|
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if ((fw_status & VK_FWSTS_READY) == VK_FWSTS_READY)
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rdy_marker = vkread32(vk, BAR_1, VK_BAR1_MSGQ_DEF_RDY);
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|
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return (rdy_marker == VK_BAR1_MSGQ_RDY_MARKER);
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}
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|
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int bcm_vk_open(struct inode *inode, struct file *p_file);
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ssize_t bcm_vk_read(struct file *p_file, char __user *buf, size_t count,
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|
loff_t *f_pos);
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ssize_t bcm_vk_write(struct file *p_file, const char __user *buf,
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|
size_t count, loff_t *f_pos);
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__poll_t bcm_vk_poll(struct file *p_file, struct poll_table_struct *wait);
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int bcm_vk_release(struct inode *inode, struct file *p_file);
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|
void bcm_vk_release_data(struct kref *kref);
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|
irqreturn_t bcm_vk_msgq_irqhandler(int irq, void *dev_id);
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|
irqreturn_t bcm_vk_notf_irqhandler(int irq, void *dev_id);
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|
irqreturn_t bcm_vk_tty_irqhandler(int irq, void *dev_id);
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|
int bcm_vk_msg_init(struct bcm_vk *vk);
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|
void bcm_vk_msg_remove(struct bcm_vk *vk);
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|
void bcm_vk_drain_msg_on_reset(struct bcm_vk *vk);
|
|
int bcm_vk_sync_msgq(struct bcm_vk *vk, bool force_sync);
|
|
void bcm_vk_blk_drv_access(struct bcm_vk *vk);
|
|
s32 bcm_to_h_msg_dequeue(struct bcm_vk *vk);
|
|
int bcm_vk_send_shutdown_msg(struct bcm_vk *vk, u32 shut_type,
|
|
const pid_t pid, const u32 q_num);
|
|
void bcm_to_v_q_doorbell(struct bcm_vk *vk, u32 q_num, u32 db_val);
|
|
int bcm_vk_auto_load_all_images(struct bcm_vk *vk);
|
|
void bcm_vk_hb_init(struct bcm_vk *vk);
|
|
void bcm_vk_hb_deinit(struct bcm_vk *vk);
|
|
void bcm_vk_handle_notf(struct bcm_vk *vk);
|
|
bool bcm_vk_drv_access_ok(struct bcm_vk *vk);
|
|
void bcm_vk_set_host_alert(struct bcm_vk *vk, u32 bit_mask);
|
|
|
|
#ifdef CONFIG_BCM_VK_TTY
|
|
int bcm_vk_tty_init(struct bcm_vk *vk, char *name);
|
|
void bcm_vk_tty_exit(struct bcm_vk *vk);
|
|
void bcm_vk_tty_terminate_tty_user(struct bcm_vk *vk);
|
|
void bcm_vk_tty_wq_exit(struct bcm_vk *vk);
|
|
|
|
static inline void bcm_vk_tty_set_irq_enabled(struct bcm_vk *vk, int index)
|
|
{
|
|
vk->tty[index].irq_enabled = true;
|
|
}
|
|
#else
|
|
static inline int bcm_vk_tty_init(struct bcm_vk *vk, char *name)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static inline void bcm_vk_tty_exit(struct bcm_vk *vk)
|
|
{
|
|
}
|
|
|
|
static inline void bcm_vk_tty_terminate_tty_user(struct bcm_vk *vk)
|
|
{
|
|
}
|
|
|
|
static inline void bcm_vk_tty_wq_exit(struct bcm_vk *vk)
|
|
{
|
|
}
|
|
|
|
static inline void bcm_vk_tty_set_irq_enabled(struct bcm_vk *vk, int index)
|
|
{
|
|
}
|
|
#endif /* CONFIG_BCM_VK_TTY */
|
|
|
|
#endif
|