164 lines
4.1 KiB
C
164 lines
4.1 KiB
C
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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//
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// This file is provided under a dual BSD/GPLv2 license. When using or
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// redistributing this file, you may do so under either license.
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//
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// Copyright(c) 2018 Intel Corporation. All rights reserved.
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//
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// Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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//
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#include <linux/pci.h>
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#include "ops.h"
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static
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bool snd_sof_pci_update_bits_unlocked(struct snd_sof_dev *sdev, u32 offset,
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u32 mask, u32 value)
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{
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struct pci_dev *pci = to_pci_dev(sdev->dev);
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unsigned int old, new;
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u32 ret = 0;
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pci_read_config_dword(pci, offset, &ret);
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old = ret;
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dev_dbg(sdev->dev, "Debug PCIR: %8.8x at %8.8x\n", old & mask, offset);
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new = (old & ~mask) | (value & mask);
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if (old == new)
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return false;
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pci_write_config_dword(pci, offset, new);
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dev_dbg(sdev->dev, "Debug PCIW: %8.8x at %8.8x\n", value,
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offset);
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return true;
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}
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bool snd_sof_pci_update_bits(struct snd_sof_dev *sdev, u32 offset,
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u32 mask, u32 value)
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{
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unsigned long flags;
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bool change;
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spin_lock_irqsave(&sdev->hw_lock, flags);
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change = snd_sof_pci_update_bits_unlocked(sdev, offset, mask, value);
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spin_unlock_irqrestore(&sdev->hw_lock, flags);
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return change;
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}
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EXPORT_SYMBOL(snd_sof_pci_update_bits);
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bool snd_sof_dsp_update_bits_unlocked(struct snd_sof_dev *sdev, u32 bar,
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u32 offset, u32 mask, u32 value)
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{
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unsigned int old, new;
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u32 ret;
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ret = snd_sof_dsp_read(sdev, bar, offset);
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old = ret;
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new = (old & ~mask) | (value & mask);
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if (old == new)
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return false;
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snd_sof_dsp_write(sdev, bar, offset, new);
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return true;
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}
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EXPORT_SYMBOL(snd_sof_dsp_update_bits_unlocked);
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bool snd_sof_dsp_update_bits64_unlocked(struct snd_sof_dev *sdev, u32 bar,
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u32 offset, u64 mask, u64 value)
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{
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u64 old, new;
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old = snd_sof_dsp_read64(sdev, bar, offset);
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new = (old & ~mask) | (value & mask);
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if (old == new)
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return false;
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snd_sof_dsp_write64(sdev, bar, offset, new);
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return true;
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}
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EXPORT_SYMBOL(snd_sof_dsp_update_bits64_unlocked);
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/* This is for registers bits with attribute RWC */
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bool snd_sof_dsp_update_bits(struct snd_sof_dev *sdev, u32 bar, u32 offset,
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u32 mask, u32 value)
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{
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unsigned long flags;
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bool change;
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spin_lock_irqsave(&sdev->hw_lock, flags);
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change = snd_sof_dsp_update_bits_unlocked(sdev, bar, offset, mask,
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value);
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spin_unlock_irqrestore(&sdev->hw_lock, flags);
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return change;
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}
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EXPORT_SYMBOL(snd_sof_dsp_update_bits);
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bool snd_sof_dsp_update_bits64(struct snd_sof_dev *sdev, u32 bar, u32 offset,
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u64 mask, u64 value)
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{
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unsigned long flags;
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bool change;
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spin_lock_irqsave(&sdev->hw_lock, flags);
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change = snd_sof_dsp_update_bits64_unlocked(sdev, bar, offset, mask,
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value);
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spin_unlock_irqrestore(&sdev->hw_lock, flags);
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return change;
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}
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EXPORT_SYMBOL(snd_sof_dsp_update_bits64);
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static
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void snd_sof_dsp_update_bits_forced_unlocked(struct snd_sof_dev *sdev, u32 bar,
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u32 offset, u32 mask, u32 value)
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{
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unsigned int old, new;
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u32 ret;
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ret = snd_sof_dsp_read(sdev, bar, offset);
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old = ret;
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new = (old & ~mask) | (value & mask);
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snd_sof_dsp_write(sdev, bar, offset, new);
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}
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/* This is for registers bits with attribute RWC */
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void snd_sof_dsp_update_bits_forced(struct snd_sof_dev *sdev, u32 bar,
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u32 offset, u32 mask, u32 value)
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{
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unsigned long flags;
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spin_lock_irqsave(&sdev->hw_lock, flags);
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snd_sof_dsp_update_bits_forced_unlocked(sdev, bar, offset, mask, value);
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spin_unlock_irqrestore(&sdev->hw_lock, flags);
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}
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EXPORT_SYMBOL(snd_sof_dsp_update_bits_forced);
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void snd_sof_dsp_panic(struct snd_sof_dev *sdev, u32 offset)
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{
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dev_err(sdev->dev, "error : DSP panic!\n");
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/*
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* check if DSP is not ready and did not set the dsp_oops_offset.
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* if the dsp_oops_offset is not set, set it from the panic message.
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* Also add a check to memory window setting with panic message.
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*/
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if (!sdev->dsp_oops_offset)
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sdev->dsp_oops_offset = offset;
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else
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dev_dbg(sdev->dev, "panic: dsp_oops_offset %zu offset %d\n",
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sdev->dsp_oops_offset, offset);
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snd_sof_dsp_dbg_dump(sdev, SOF_DBG_REGS | SOF_DBG_MBOX);
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snd_sof_trace_notify_for_error(sdev);
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}
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EXPORT_SYMBOL(snd_sof_dsp_panic);
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