70 lines
2.1 KiB
Plaintext
70 lines
2.1 KiB
Plaintext
* DMA40 DMA Controller
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Required properties:
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- compatible: "stericsson,dma40"
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- reg: Address range of the DMAC registers
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- reg-names: Names of the above areas to use during resource look-up
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- interrupt: Should contain the DMAC interrupt number
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- #dma-cells: must be <3>
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- memcpy-channels: Channels to be used for memcpy
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Optional properties:
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- dma-channels: Number of channels supported by hardware - if not present
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the driver will attempt to obtain the information from H/W
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- disabled-channels: Channels which can not be used
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Example:
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dma: dma-controller@801C0000 {
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compatible = "stericsson,db8500-dma40", "stericsson,dma40";
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reg = <0x801C0000 0x1000 0x40010000 0x800>;
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reg-names = "base", "lcpa";
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interrupt-parent = <&intc>;
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interrupts = <0 25 0x4>;
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#dma-cells = <2>;
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memcpy-channels = <56 57 58 59 60>;
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disabled-channels = <12>;
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dma-channels = <8>;
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};
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Clients
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Required properties:
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- dmas: Comma separated list of dma channel requests
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- dma-names: Names of the aforementioned requested channels
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Each dmas request consists of 4 cells:
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1. A phandle pointing to the DMA controller
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2. Device Type
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3. The DMA request line number (only when 'use fixed channel' is set)
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4. A 32bit mask specifying; mode, direction and endianness [NB: This list will grow]
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0x00000001: Mode:
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Logical channel when unset
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Physical channel when set
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0x00000002: Direction:
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Memory to Device when unset
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Device to Memory when set
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0x00000004: Endianness:
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Little endian when unset
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Big endian when set
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0x00000008: Use fixed channel:
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Use automatic channel selection when unset
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Use DMA request line number when set
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0x00000010: Set channel as high priority:
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Normal priority when unset
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High priority when set
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Example:
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uart@80120000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x80120000 0x1000>;
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interrupts = <0 11 0x4>;
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dmas = <&dma 13 0 0x2>, /* Logical - DevToMem */
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<&dma 13 0 0x0>; /* Logical - MemToDev */
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dma-names = "rx", "rx";
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status = "disabled";
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};
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