Stephen Boyd ff060019f4 Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and 'clk-spdx' into clk-next ... - Support for STM32F769 - Rework AT91 sckc DT bindings - Fix slow RC oscillator issue on sama5d3 - AT91 sam9x60 PMC support - SiFive FU540 PRCI and PLL support * clk-stm32f4: clk: stm32mp1: Add ddrperfm clock clk: stm32: Introduce clocks of STM32F769 board * clk-tegra: clk: tegra: divider: Mark Memory Controller clock as read-only clk: tegra: emc: Replace BUG() with WARN_ONCE() clk: tegra: emc: Fix EMC max-rate clamping clk: tegra: emc: Support multiple RAM codes clk: tegra: emc: Don't enable EMC clock manually clk: tegra124: Remove lock-enable bit from PLLM clk: tegra: Fix PLLM programming on Tegra124+ when PMC overrides divider clk: tegra: Don't enable already enabled PLLs * clk-at91: clk: at91: Mark struct clk_range as const clk: at91: add sam9x60 pmc driver dt-bindings: clk: at91: add bindings for SAM9X60 pmc clk: at91: add sam9x60 PLL driver clk: at91: master: Add sam9x60 support clk: at91: usb: Add sam9x60 support clk: at91: allow configuring generated PCR layout clk: at91: allow configuring peripheral PCR layout clk: at91: sckc: handle different RC startup time clk: at91: modernize sckc binding dt-bindings: clock: at91: new sckc bindings * clk-sifive-fu540: clk: sifive: add a driver for the SiFive FU540 PRCI IP block clk: analogbits: add Wide-Range PLL library dt-bindings: clk: add documentation for the SiFive PRCI driver * clk-spdx: clk: sunxi-ng: Use the correct style for SPDX License Identifier clk: sprd: Use the correct style for SPDX License Identifier clk: renesas: Use the correct style for SPDX License Identifier clk: qcom: Use the correct style for SPDX License Identifier clk: davinci: Use the correct style for SPDX License Identifier clk: actions: Use the correct style for SPDX License Identifier		2019-05-07 11:45:29 -07:00
..
Kconfig	Merge branch 'clk-renesas' into clk-next	2018-10-18 15:38:51 -07:00
Makefile	clk: renesas: cpg-mssr: Add r8a774c0 support	2018-09-19 16:42:14 +02:00
clk-div6.c	clk: renesas: Remove usage of CLK_IS_BASIC	2018-12-10 14:43:04 -08:00
clk-div6.h	We have two changes to the core framework this time around. The first being a	2017-11-17 20:04:24 -08:00
clk-emev2.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-mstp.c	Merge branch 'clk-of' into clk-next	2018-12-14 14:02:55 -08:00
clk-r8a73a4.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-r8a7740.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-r8a7778.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-r8a7779.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-rcar-gen2.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-rz.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
clk-sh73a0.c	Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next	2018-10-18 15:33:52 -07:00
r7s9210-cpg-mssr.c	clk: renesas: r7s9210: Always use readl()	2019-04-02 09:50:48 +02:00
r8a774a1-cpg-mssr.c	clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC	2019-04-02 10:08:35 +02:00
r8a774c0-cpg-mssr.c	clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC	2019-04-02 10:08:35 +02:00
r8a7743-cpg-mssr.c	Merge branch 'clk-renesas' into clk-next	2018-10-18 15:38:51 -07:00
r8a7745-cpg-mssr.c	clk: renesas: Convert to SPDX identifiers	2018-09-28 17:16:37 -07:00
r8a7790-cpg-mssr.c	clk: renesas: Convert to SPDX identifiers	2018-09-28 17:16:37 -07:00
r8a7791-cpg-mssr.c	clk: renesas: Convert to SPDX identifiers	2018-09-28 17:16:37 -07:00
r8a7792-cpg-mssr.c	clk: renesas: Convert to SPDX identifiers	2018-09-28 17:16:37 -07:00
r8a7794-cpg-mssr.c	clk: renesas: Convert to SPDX identifiers	2018-09-28 17:16:37 -07:00
r8a7795-cpg-mssr.c	clk: renesas: rcar-gen3: Rename DRIF clocks	2019-04-02 10:08:39 +02:00
r8a7796-cpg-mssr.c	clk: renesas: rcar-gen3: Rename DRIF clocks	2019-04-02 10:08:39 +02:00
r8a77470-cpg-mssr.c	clk: renesas: cpg-mssr: Add r8a77470 support	2018-04-16 13:39:40 +02:00
r8a77965-cpg-mssr.c	clk: renesas: rcar-gen3: Rename DRIF clocks	2019-04-02 10:08:39 +02:00
r8a77970-cpg-mssr.c	clk: renesas: r8a77970: Add CPEX clock	2018-12-04 10:29:48 +01:00
r8a77980-cpg-mssr.c	clk: renesas: r8a77980: Fix RPC-IF module clock's parent	2019-04-02 10:31:05 +02:00
r8a77990-cpg-mssr.c	clk: renesas: rcar-gen3: Rename DRIF clocks	2019-04-02 10:08:39 +02:00
r8a77995-cpg-mssr.c	clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC	2019-04-02 10:08:35 +02:00
r9a06g032-clocks.c	clk: renesas: r9a06g032: Add missing PCI USB clock	2019-04-02 09:50:48 +02:00
rcar-gen2-cpg.c	clk: renesas: Convert to SPDX identifiers	2018-09-28 17:16:37 -07:00
rcar-gen2-cpg.h	clk: renesas: Use the correct style for SPDX License Identifier	2019-05-01 13:01:18 -07:00
rcar-gen3-cpg.c	clk: renesas: rcar-gen3: Remove unused variable	2019-04-11 10:35:45 -07:00
rcar-gen3-cpg.h	Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and 'clk-spdx' into clk-next	2019-05-07 11:45:29 -07:00
rcar-usb2-clock-sel.c	clk: renesas: use SPDX identifier for Renesas drivers	2018-08-30 18:18:44 -07:00
renesas-cpg-mssr.c	clk: renesas: Remove usage of CLK_IS_BASIC	2018-12-10 14:43:04 -08:00
renesas-cpg-mssr.h	clk: renesas: Use the correct style for SPDX License Identifier	2019-05-01 13:01:18 -07:00