266 lines
6.3 KiB
C
266 lines
6.3 KiB
C
/*
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* Copyright 2001 MontaVista Software Inc.
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* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
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* Copyright (c) 2003, 2004 Maciej W. Rozycki
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*
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* Common time service routines for MIPS machines. See
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* Documentation/mips/time.README.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/bug.h>
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#include <linux/clockchips.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/param.h>
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#include <linux/profile.h>
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#include <linux/time.h>
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#include <linux/timex.h>
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#include <linux/smp.h>
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#include <linux/kernel_stat.h>
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/kallsyms.h>
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#include <asm/bootinfo.h>
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#include <asm/cache.h>
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#include <asm/compiler.h>
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#include <asm/cpu.h>
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#include <asm/cpu-features.h>
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#include <asm/div64.h>
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#include <asm/sections.h>
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#include <asm/smtc_ipi.h>
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#include <asm/time.h>
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#include <irq.h>
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/*
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* forward reference
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*/
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DEFINE_SPINLOCK(rtc_lock);
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EXPORT_SYMBOL(rtc_lock);
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int __weak rtc_mips_set_time(unsigned long sec)
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{
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return 0;
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}
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EXPORT_SYMBOL(rtc_mips_set_time);
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int __weak rtc_mips_set_mmss(unsigned long nowtime)
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{
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return rtc_mips_set_time(nowtime);
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}
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int update_persistent_clock(struct timespec now)
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{
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return rtc_mips_set_mmss(now.tv_sec);
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}
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/*
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* Null high precision timer functions for systems lacking one.
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*/
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static cycle_t null_hpt_read(void)
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{
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return 0;
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}
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/*
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* High precision timer functions for a R4k-compatible timer.
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*/
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static cycle_t c0_hpt_read(void)
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{
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return read_c0_count();
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}
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int (*mips_timer_state)(void);
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/*
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* local_timer_interrupt() does profiling and process accounting
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* on a per-CPU basis.
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*
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* In UP mode, it is invoked from the (global) timer_interrupt.
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*
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* In SMP mode, it might invoked by per-CPU timer interrupt, or
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* a broadcasted inter-processor interrupt which itself is triggered
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* by the global timer interrupt.
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*/
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void local_timer_interrupt(int irq, void *dev_id)
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{
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profile_tick(CPU_PROFILING);
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update_process_times(user_mode(get_irq_regs()));
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}
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int null_perf_irq(void)
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{
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return 0;
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}
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EXPORT_SYMBOL(null_perf_irq);
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int (*perf_irq)(void) = null_perf_irq;
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EXPORT_SYMBOL(perf_irq);
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/*
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* time_init() - it does the following things.
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*
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* 1) plat_time_init() -
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* a) (optional) set up RTC routines,
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* b) (optional) calibrate and set the mips_hpt_frequency
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* (only needed if you intended to use cpu counter as timer interrupt
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* source)
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* 2) calculate a couple of cached variables for later usage
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*/
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unsigned int mips_hpt_frequency;
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static unsigned int __init calibrate_hpt(void)
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{
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cycle_t frequency, hpt_start, hpt_end, hpt_count, hz;
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const int loops = HZ / 10;
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int log_2_loops = 0;
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int i;
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/*
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* We want to calibrate for 0.1s, but to avoid a 64-bit
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* division we round the number of loops up to the nearest
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* power of 2.
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*/
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while (loops > 1 << log_2_loops)
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log_2_loops++;
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i = 1 << log_2_loops;
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/*
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* Wait for a rising edge of the timer interrupt.
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*/
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while (mips_timer_state());
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while (!mips_timer_state());
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/*
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* Now see how many high precision timer ticks happen
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* during the calculated number of periods between timer
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* interrupts.
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*/
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hpt_start = clocksource_mips.read();
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do {
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while (mips_timer_state());
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while (!mips_timer_state());
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} while (--i);
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hpt_end = clocksource_mips.read();
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hpt_count = (hpt_end - hpt_start) & clocksource_mips.mask;
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hz = HZ;
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frequency = hpt_count * hz;
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return frequency >> log_2_loops;
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}
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struct clocksource clocksource_mips = {
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.name = "MIPS",
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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void __init clocksource_set_clock(struct clocksource *cs, unsigned int clock)
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{
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u64 temp;
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u32 shift;
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/* Find a shift value */
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for (shift = 32; shift > 0; shift--) {
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temp = (u64) NSEC_PER_SEC << shift;
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do_div(temp, clock);
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if ((temp >> 32) == 0)
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break;
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}
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cs->shift = shift;
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cs->mult = (u32) temp;
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}
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void __cpuinit clockevent_set_clock(struct clock_event_device *cd,
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unsigned int clock)
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{
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u64 temp;
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u32 shift;
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/* Find a shift value */
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for (shift = 32; shift > 0; shift--) {
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temp = (u64) clock << shift;
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do_div(temp, NSEC_PER_SEC);
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if ((temp >> 32) == 0)
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break;
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}
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cd->shift = shift;
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cd->mult = (u32) temp;
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}
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static void __init init_mips_clocksource(void)
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{
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if (!mips_hpt_frequency || clocksource_mips.read == null_hpt_read)
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return;
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/* Calclate a somewhat reasonable rating value */
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clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000;
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clocksource_set_clock(&clocksource_mips, mips_hpt_frequency);
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clocksource_register(&clocksource_mips);
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}
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void __init __weak plat_time_init(void)
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{
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}
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/*
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* This function exists in order to cause an error due to a duplicate
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* definition if platform code should have its own implementation. The hook
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* to use instead is plat_time_init. plat_time_init does not receive the
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* irqaction pointer argument anymore. This is because any function which
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* initializes an interrupt timer now takes care of its own request_irq rsp.
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* setup_irq calls and each clock_event_device should use its own
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* struct irqrequest.
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*/
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void __init plat_timer_setup(struct irqaction *irq)
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{
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BUG();
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}
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void __init time_init(void)
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{
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plat_time_init();
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/* Choose appropriate high precision timer routines. */
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if (!cpu_has_counter && !clocksource_mips.read)
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/* No high precision timer -- sorry. */
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clocksource_mips.read = null_hpt_read;
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else if (!mips_hpt_frequency && !mips_timer_state) {
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/* A high precision timer of unknown frequency. */
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if (!clocksource_mips.read)
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/* No external high precision timer -- use R4k. */
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clocksource_mips.read = c0_hpt_read;
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} else {
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/* We know counter frequency. Or we can get it. */
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if (!clocksource_mips.read) {
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/* No external high precision timer -- use R4k. */
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clocksource_mips.read = c0_hpt_read;
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}
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if (!mips_hpt_frequency)
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mips_hpt_frequency = calibrate_hpt();
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/* Report the high precision timer rate for a reference. */
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printk("Using %u.%03u MHz high precision timer.\n",
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((mips_hpt_frequency + 500) / 1000) / 1000,
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((mips_hpt_frequency + 500) / 1000) % 1000);
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}
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init_mips_clocksource();
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mips_clockevent_init();
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}
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