404 lines
9.6 KiB
C
404 lines
9.6 KiB
C
/*
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* NEC NL8048HL11 Panel driver
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*
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* Copyright (C) 2010 Texas Instruments Inc.
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* Author: Erik Gilling <konkers@android.com>
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* Converted to new DSS device model: Tomi Valkeinen <tomi.valkeinen@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/spi/spi.h>
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#include <linux/fb.h>
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#include <linux/gpio/consumer.h>
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#include <linux/of_gpio.h>
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#include <video/omapdss.h>
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struct panel_drv_data {
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struct omap_dss_device dssdev;
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struct omap_dss_device *in;
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struct omap_video_timings videomode;
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int data_lines;
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int res_gpio;
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int qvga_gpio;
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struct spi_device *spi;
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};
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#define LCD_XRES 800
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#define LCD_YRES 480
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/*
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* NEC PIX Clock Ratings
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* MIN:21.8MHz TYP:23.8MHz MAX:25.7MHz
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*/
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#define LCD_PIXEL_CLOCK 23800000
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static const struct {
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unsigned char addr;
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unsigned char dat;
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} nec_8048_init_seq[] = {
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{ 3, 0x01 }, { 0, 0x00 }, { 1, 0x01 }, { 4, 0x00 }, { 5, 0x14 },
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{ 6, 0x24 }, { 16, 0xD7 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x55 },
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{ 20, 0x01 }, { 21, 0x70 }, { 22, 0x1E }, { 23, 0x25 }, { 24, 0x25 },
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{ 25, 0x02 }, { 26, 0x02 }, { 27, 0xA0 }, { 32, 0x2F }, { 33, 0x0F },
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{ 34, 0x0F }, { 35, 0x0F }, { 36, 0x0F }, { 37, 0x0F }, { 38, 0x0F },
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{ 39, 0x00 }, { 40, 0x02 }, { 41, 0x02 }, { 42, 0x02 }, { 43, 0x0F },
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{ 44, 0x0F }, { 45, 0x0F }, { 46, 0x0F }, { 47, 0x0F }, { 48, 0x0F },
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{ 49, 0x0F }, { 50, 0x00 }, { 51, 0x02 }, { 52, 0x02 }, { 53, 0x02 },
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{ 80, 0x0C }, { 83, 0x42 }, { 84, 0x42 }, { 85, 0x41 }, { 86, 0x14 },
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{ 89, 0x88 }, { 90, 0x01 }, { 91, 0x00 }, { 92, 0x02 }, { 93, 0x0C },
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{ 94, 0x1C }, { 95, 0x27 }, { 98, 0x49 }, { 99, 0x27 }, { 102, 0x76 },
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{ 103, 0x27 }, { 112, 0x01 }, { 113, 0x0E }, { 114, 0x02 },
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{ 115, 0x0C }, { 118, 0x0C }, { 121, 0x30 }, { 130, 0x00 },
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{ 131, 0x00 }, { 132, 0xFC }, { 134, 0x00 }, { 136, 0x00 },
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{ 138, 0x00 }, { 139, 0x00 }, { 140, 0x00 }, { 141, 0xFC },
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{ 143, 0x00 }, { 145, 0x00 }, { 147, 0x00 }, { 148, 0x00 },
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{ 149, 0x00 }, { 150, 0xFC }, { 152, 0x00 }, { 154, 0x00 },
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{ 156, 0x00 }, { 157, 0x00 }, { 2, 0x00 },
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};
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static const struct omap_video_timings nec_8048_panel_timings = {
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.x_res = LCD_XRES,
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.y_res = LCD_YRES,
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.pixelclock = LCD_PIXEL_CLOCK,
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.hfp = 6,
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.hsw = 1,
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.hbp = 4,
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.vfp = 3,
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.vsw = 1,
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.vbp = 4,
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.vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
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.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
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.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
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.de_level = OMAPDSS_SIG_ACTIVE_HIGH,
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.sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
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};
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#define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
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static int nec_8048_spi_send(struct spi_device *spi, unsigned char reg_addr,
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unsigned char reg_data)
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{
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int ret = 0;
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unsigned int cmd = 0, data = 0;
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cmd = 0x0000 | reg_addr; /* register address write */
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data = 0x0100 | reg_data; /* register data write */
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data = (cmd << 16) | data;
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ret = spi_write(spi, (unsigned char *)&data, 4);
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if (ret)
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pr_err("error in spi_write %x\n", data);
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return ret;
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}
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static int init_nec_8048_wvga_lcd(struct spi_device *spi)
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{
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unsigned int i;
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/* Initialization Sequence */
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/* nec_8048_spi_send(spi, REG, VAL) */
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for (i = 0; i < (ARRAY_SIZE(nec_8048_init_seq) - 1); i++)
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nec_8048_spi_send(spi, nec_8048_init_seq[i].addr,
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nec_8048_init_seq[i].dat);
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udelay(20);
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nec_8048_spi_send(spi, nec_8048_init_seq[i].addr,
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nec_8048_init_seq[i].dat);
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return 0;
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}
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static int nec_8048_connect(struct omap_dss_device *dssdev)
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{
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struct panel_drv_data *ddata = to_panel_data(dssdev);
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struct omap_dss_device *in = ddata->in;
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int r;
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if (omapdss_device_is_connected(dssdev))
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return 0;
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r = in->ops.dpi->connect(in, dssdev);
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if (r)
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return r;
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return 0;
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}
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static void nec_8048_disconnect(struct omap_dss_device *dssdev)
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{
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struct panel_drv_data *ddata = to_panel_data(dssdev);
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struct omap_dss_device *in = ddata->in;
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if (!omapdss_device_is_connected(dssdev))
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return;
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in->ops.dpi->disconnect(in, dssdev);
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}
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static int nec_8048_enable(struct omap_dss_device *dssdev)
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{
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struct panel_drv_data *ddata = to_panel_data(dssdev);
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struct omap_dss_device *in = ddata->in;
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int r;
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if (!omapdss_device_is_connected(dssdev))
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return -ENODEV;
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if (omapdss_device_is_enabled(dssdev))
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return 0;
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if (ddata->data_lines)
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in->ops.dpi->set_data_lines(in, ddata->data_lines);
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in->ops.dpi->set_timings(in, &ddata->videomode);
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r = in->ops.dpi->enable(in);
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if (r)
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return r;
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if (gpio_is_valid(ddata->res_gpio))
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gpio_set_value_cansleep(ddata->res_gpio, 1);
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dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
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return 0;
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}
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static void nec_8048_disable(struct omap_dss_device *dssdev)
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{
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struct panel_drv_data *ddata = to_panel_data(dssdev);
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struct omap_dss_device *in = ddata->in;
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if (!omapdss_device_is_enabled(dssdev))
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return;
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if (gpio_is_valid(ddata->res_gpio))
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gpio_set_value_cansleep(ddata->res_gpio, 0);
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in->ops.dpi->disable(in);
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dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
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}
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static void nec_8048_set_timings(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings)
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{
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struct panel_drv_data *ddata = to_panel_data(dssdev);
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struct omap_dss_device *in = ddata->in;
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ddata->videomode = *timings;
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dssdev->panel.timings = *timings;
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in->ops.dpi->set_timings(in, timings);
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}
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static void nec_8048_get_timings(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings)
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{
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struct panel_drv_data *ddata = to_panel_data(dssdev);
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*timings = ddata->videomode;
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}
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static int nec_8048_check_timings(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings)
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{
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struct panel_drv_data *ddata = to_panel_data(dssdev);
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struct omap_dss_device *in = ddata->in;
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return in->ops.dpi->check_timings(in, timings);
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}
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static struct omap_dss_driver nec_8048_ops = {
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.connect = nec_8048_connect,
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.disconnect = nec_8048_disconnect,
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.enable = nec_8048_enable,
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.disable = nec_8048_disable,
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.set_timings = nec_8048_set_timings,
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.get_timings = nec_8048_get_timings,
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.check_timings = nec_8048_check_timings,
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.get_resolution = omapdss_default_get_resolution,
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};
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static int nec_8048_probe_of(struct spi_device *spi)
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{
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struct device_node *node = spi->dev.of_node;
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struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
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struct omap_dss_device *in;
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int gpio;
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gpio = of_get_named_gpio(node, "reset-gpios", 0);
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if (!gpio_is_valid(gpio)) {
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dev_err(&spi->dev, "failed to parse enable gpio\n");
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return gpio;
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}
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ddata->res_gpio = gpio;
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/* XXX the panel spec doesn't mention any QVGA pin?? */
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ddata->qvga_gpio = -ENOENT;
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in = omapdss_of_find_source_for_first_ep(node);
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if (IS_ERR(in)) {
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dev_err(&spi->dev, "failed to find video source\n");
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return PTR_ERR(in);
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}
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ddata->in = in;
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return 0;
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}
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static int nec_8048_probe(struct spi_device *spi)
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{
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struct panel_drv_data *ddata;
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struct omap_dss_device *dssdev;
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int r;
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dev_dbg(&spi->dev, "%s\n", __func__);
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spi->mode = SPI_MODE_0;
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spi->bits_per_word = 32;
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r = spi_setup(spi);
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if (r < 0) {
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dev_err(&spi->dev, "spi_setup failed: %d\n", r);
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return r;
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}
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init_nec_8048_wvga_lcd(spi);
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ddata = devm_kzalloc(&spi->dev, sizeof(*ddata), GFP_KERNEL);
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if (ddata == NULL)
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return -ENOMEM;
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dev_set_drvdata(&spi->dev, ddata);
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ddata->spi = spi;
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if (!spi->dev.of_node)
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return -ENODEV;
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r = nec_8048_probe_of(spi);
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if (r)
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return r;
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if (gpio_is_valid(ddata->qvga_gpio)) {
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r = devm_gpio_request_one(&spi->dev, ddata->qvga_gpio,
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GPIOF_OUT_INIT_HIGH, "lcd QVGA");
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if (r)
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goto err_gpio;
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}
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if (gpio_is_valid(ddata->res_gpio)) {
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r = devm_gpio_request_one(&spi->dev, ddata->res_gpio,
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GPIOF_OUT_INIT_LOW, "lcd RES");
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if (r)
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goto err_gpio;
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}
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ddata->videomode = nec_8048_panel_timings;
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dssdev = &ddata->dssdev;
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dssdev->dev = &spi->dev;
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dssdev->driver = &nec_8048_ops;
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dssdev->type = OMAP_DISPLAY_TYPE_DPI;
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dssdev->owner = THIS_MODULE;
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dssdev->panel.timings = ddata->videomode;
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r = omapdss_register_display(dssdev);
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if (r) {
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dev_err(&spi->dev, "Failed to register panel\n");
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goto err_reg;
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}
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return 0;
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err_reg:
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err_gpio:
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omap_dss_put_device(ddata->in);
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return r;
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}
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static int nec_8048_remove(struct spi_device *spi)
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{
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struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
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struct omap_dss_device *dssdev = &ddata->dssdev;
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struct omap_dss_device *in = ddata->in;
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dev_dbg(&ddata->spi->dev, "%s\n", __func__);
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omapdss_unregister_display(dssdev);
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nec_8048_disable(dssdev);
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nec_8048_disconnect(dssdev);
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omap_dss_put_device(in);
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int nec_8048_suspend(struct device *dev)
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{
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struct spi_device *spi = to_spi_device(dev);
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nec_8048_spi_send(spi, 2, 0x01);
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mdelay(40);
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return 0;
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}
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static int nec_8048_resume(struct device *dev)
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{
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struct spi_device *spi = to_spi_device(dev);
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/* reinitialize the panel */
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spi_setup(spi);
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nec_8048_spi_send(spi, 2, 0x00);
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init_nec_8048_wvga_lcd(spi);
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return 0;
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}
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static SIMPLE_DEV_PM_OPS(nec_8048_pm_ops, nec_8048_suspend,
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nec_8048_resume);
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#define NEC_8048_PM_OPS (&nec_8048_pm_ops)
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#else
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#define NEC_8048_PM_OPS NULL
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#endif
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static const struct of_device_id nec_8048_of_match[] = {
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{ .compatible = "omapdss,nec,nl8048hl11", },
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{},
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};
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MODULE_DEVICE_TABLE(of, nec_8048_of_match);
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static struct spi_driver nec_8048_driver = {
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.driver = {
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.name = "panel-nec-nl8048hl11",
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.pm = NEC_8048_PM_OPS,
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.of_match_table = nec_8048_of_match,
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.suppress_bind_attrs = true,
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},
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.probe = nec_8048_probe,
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.remove = nec_8048_remove,
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};
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module_spi_driver(nec_8048_driver);
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MODULE_ALIAS("spi:nec,nl8048hl11");
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MODULE_AUTHOR("Erik Gilling <konkers@android.com>");
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MODULE_DESCRIPTION("NEC-NL8048HL11 Driver");
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MODULE_LICENSE("GPL");
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