823 lines
18 KiB
C
823 lines
18 KiB
C
/*
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* linux/arch/arm/kernel/ptrace.c
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*
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* By Ross Biro 1/23/92
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* edited by Linus Torvalds
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* ARM modifications Copyright (C) 2000 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/ptrace.h>
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#include <linux/user.h>
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#include <linux/security.h>
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#include <linux/init.h>
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#include <linux/signal.h>
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#include <asm/uaccess.h>
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#include <asm/pgtable.h>
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#include <asm/system.h>
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#include <asm/traps.h>
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#include "ptrace.h"
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#define REG_PC 15
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#define REG_PSR 16
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/*
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* does not yet catch signals sent when the child dies.
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* in exit.c or in signal.c.
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*/
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#if 0
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/*
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* Breakpoint SWI instruction: SWI &9F0001
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*/
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#define BREAKINST_ARM 0xef9f0001
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#define BREAKINST_THUMB 0xdf00 /* fill this in later */
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#else
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/*
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* New breakpoints - use an undefined instruction. The ARM architecture
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* reference manual guarantees that the following instruction space
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* will produce an undefined instruction exception on all CPUs:
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*
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* ARM: xxxx 0111 1111 xxxx xxxx xxxx 1111 xxxx
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* Thumb: 1101 1110 xxxx xxxx
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*/
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#define BREAKINST_ARM 0xe7f001f0
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#define BREAKINST_THUMB 0xde01
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#endif
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/*
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* this routine will get a word off of the processes privileged stack.
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* the offset is how far from the base addr as stored in the THREAD.
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* this routine assumes that all the privileged stacks are in our
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* data space.
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*/
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static inline long get_user_reg(struct task_struct *task, int offset)
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{
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return task_pt_regs(task)->uregs[offset];
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}
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/*
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* this routine will put a word on the processes privileged stack.
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* the offset is how far from the base addr as stored in the THREAD.
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* this routine assumes that all the privileged stacks are in our
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* data space.
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*/
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static inline int
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put_user_reg(struct task_struct *task, int offset, long data)
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{
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struct pt_regs newregs, *regs = task_pt_regs(task);
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int ret = -EINVAL;
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newregs = *regs;
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newregs.uregs[offset] = data;
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if (valid_user_regs(&newregs)) {
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regs->uregs[offset] = data;
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ret = 0;
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}
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return ret;
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}
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static inline int
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read_u32(struct task_struct *task, unsigned long addr, u32 *res)
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{
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int ret;
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ret = access_process_vm(task, addr, res, sizeof(*res), 0);
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return ret == sizeof(*res) ? 0 : -EIO;
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}
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static inline int
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read_instr(struct task_struct *task, unsigned long addr, u32 *res)
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{
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int ret;
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if (addr & 1) {
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u16 val;
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ret = access_process_vm(task, addr & ~1, &val, sizeof(val), 0);
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ret = ret == sizeof(val) ? 0 : -EIO;
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*res = val;
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} else {
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u32 val;
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ret = access_process_vm(task, addr & ~3, &val, sizeof(val), 0);
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ret = ret == sizeof(val) ? 0 : -EIO;
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*res = val;
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}
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return ret;
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}
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/*
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* Get value of register `rn' (in the instruction)
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*/
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static unsigned long
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ptrace_getrn(struct task_struct *child, unsigned long insn)
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{
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unsigned int reg = (insn >> 16) & 15;
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unsigned long val;
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val = get_user_reg(child, reg);
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if (reg == 15)
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val = pc_pointer(val + 8);
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return val;
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}
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/*
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* Get value of operand 2 (in an ALU instruction)
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*/
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static unsigned long
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ptrace_getaluop2(struct task_struct *child, unsigned long insn)
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{
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unsigned long val;
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int shift;
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int type;
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if (insn & 1 << 25) {
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val = insn & 255;
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shift = (insn >> 8) & 15;
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type = 3;
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} else {
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val = get_user_reg (child, insn & 15);
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if (insn & (1 << 4))
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shift = (int)get_user_reg (child, (insn >> 8) & 15);
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else
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shift = (insn >> 7) & 31;
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type = (insn >> 5) & 3;
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}
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switch (type) {
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case 0: val <<= shift; break;
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case 1: val >>= shift; break;
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case 2:
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val = (((signed long)val) >> shift);
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break;
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case 3:
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val = (val >> shift) | (val << (32 - shift));
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break;
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}
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return val;
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}
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/*
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* Get value of operand 2 (in a LDR instruction)
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*/
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static unsigned long
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ptrace_getldrop2(struct task_struct *child, unsigned long insn)
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{
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unsigned long val;
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int shift;
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int type;
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val = get_user_reg(child, insn & 15);
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shift = (insn >> 7) & 31;
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type = (insn >> 5) & 3;
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switch (type) {
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case 0: val <<= shift; break;
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case 1: val >>= shift; break;
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case 2:
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val = (((signed long)val) >> shift);
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break;
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case 3:
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val = (val >> shift) | (val << (32 - shift));
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break;
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}
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return val;
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}
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#define OP_MASK 0x01e00000
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#define OP_AND 0x00000000
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#define OP_EOR 0x00200000
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#define OP_SUB 0x00400000
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#define OP_RSB 0x00600000
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#define OP_ADD 0x00800000
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#define OP_ADC 0x00a00000
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#define OP_SBC 0x00c00000
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#define OP_RSC 0x00e00000
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#define OP_ORR 0x01800000
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#define OP_MOV 0x01a00000
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#define OP_BIC 0x01c00000
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#define OP_MVN 0x01e00000
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static unsigned long
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get_branch_address(struct task_struct *child, unsigned long pc, unsigned long insn)
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{
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u32 alt = 0;
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switch (insn & 0x0e000000) {
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case 0x00000000:
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case 0x02000000: {
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/*
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* data processing
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*/
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long aluop1, aluop2, ccbit;
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if ((insn & 0x0fffffd0) == 0x012fff10) {
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/*
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* bx or blx
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*/
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alt = get_user_reg(child, insn & 15);
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break;
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}
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if ((insn & 0xf000) != 0xf000)
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break;
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aluop1 = ptrace_getrn(child, insn);
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aluop2 = ptrace_getaluop2(child, insn);
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ccbit = get_user_reg(child, REG_PSR) & PSR_C_BIT ? 1 : 0;
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switch (insn & OP_MASK) {
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case OP_AND: alt = aluop1 & aluop2; break;
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case OP_EOR: alt = aluop1 ^ aluop2; break;
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case OP_SUB: alt = aluop1 - aluop2; break;
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case OP_RSB: alt = aluop2 - aluop1; break;
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case OP_ADD: alt = aluop1 + aluop2; break;
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case OP_ADC: alt = aluop1 + aluop2 + ccbit; break;
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case OP_SBC: alt = aluop1 - aluop2 + ccbit; break;
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case OP_RSC: alt = aluop2 - aluop1 + ccbit; break;
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case OP_ORR: alt = aluop1 | aluop2; break;
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case OP_MOV: alt = aluop2; break;
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case OP_BIC: alt = aluop1 & ~aluop2; break;
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case OP_MVN: alt = ~aluop2; break;
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}
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break;
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}
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case 0x04000000:
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case 0x06000000:
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/*
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* ldr
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*/
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if ((insn & 0x0010f000) == 0x0010f000) {
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unsigned long base;
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base = ptrace_getrn(child, insn);
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if (insn & 1 << 24) {
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long aluop2;
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if (insn & 0x02000000)
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aluop2 = ptrace_getldrop2(child, insn);
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else
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aluop2 = insn & 0xfff;
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if (insn & 1 << 23)
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base += aluop2;
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else
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base -= aluop2;
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}
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if (read_u32(child, base, &alt) == 0)
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alt = pc_pointer(alt);
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}
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break;
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case 0x08000000:
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/*
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* ldm
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*/
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if ((insn & 0x00108000) == 0x00108000) {
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unsigned long base;
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unsigned int nr_regs;
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if (insn & (1 << 23)) {
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nr_regs = hweight16(insn & 65535) << 2;
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if (!(insn & (1 << 24)))
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nr_regs -= 4;
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} else {
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if (insn & (1 << 24))
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nr_regs = -4;
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else
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nr_regs = 0;
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}
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base = ptrace_getrn(child, insn);
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if (read_u32(child, base + nr_regs, &alt) == 0)
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alt = pc_pointer(alt);
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break;
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}
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break;
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case 0x0a000000: {
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/*
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* bl or b
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*/
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signed long displ;
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/* It's a branch/branch link: instead of trying to
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* figure out whether the branch will be taken or not,
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* we'll put a breakpoint at both locations. This is
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* simpler, more reliable, and probably not a whole lot
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* slower than the alternative approach of emulating the
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* branch.
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*/
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displ = (insn & 0x00ffffff) << 8;
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displ = (displ >> 6) + 8;
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if (displ != 0 && displ != 4)
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alt = pc + displ;
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}
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break;
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}
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return alt;
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}
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static int
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swap_insn(struct task_struct *task, unsigned long addr,
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void *old_insn, void *new_insn, int size)
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{
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int ret;
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ret = access_process_vm(task, addr, old_insn, size, 0);
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if (ret == size)
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ret = access_process_vm(task, addr, new_insn, size, 1);
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return ret;
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}
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static void
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add_breakpoint(struct task_struct *task, struct debug_info *dbg, unsigned long addr)
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{
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int nr = dbg->nsaved;
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if (nr < 2) {
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u32 new_insn = BREAKINST_ARM;
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int res;
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res = swap_insn(task, addr, &dbg->bp[nr].insn, &new_insn, 4);
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if (res == 4) {
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dbg->bp[nr].address = addr;
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dbg->nsaved += 1;
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}
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} else
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printk(KERN_ERR "ptrace: too many breakpoints\n");
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}
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/*
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* Clear one breakpoint in the user program. We copy what the hardware
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* does and use bit 0 of the address to indicate whether this is a Thumb
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* breakpoint or an ARM breakpoint.
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*/
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static void clear_breakpoint(struct task_struct *task, struct debug_entry *bp)
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{
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unsigned long addr = bp->address;
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union debug_insn old_insn;
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int ret;
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if (addr & 1) {
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ret = swap_insn(task, addr & ~1, &old_insn.thumb,
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&bp->insn.thumb, 2);
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if (ret != 2 || old_insn.thumb != BREAKINST_THUMB)
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printk(KERN_ERR "%s:%d: corrupted Thumb breakpoint at "
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"0x%08lx (0x%04x)\n", task->comm, task->pid,
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addr, old_insn.thumb);
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} else {
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ret = swap_insn(task, addr & ~3, &old_insn.arm,
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&bp->insn.arm, 4);
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if (ret != 4 || old_insn.arm != BREAKINST_ARM)
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printk(KERN_ERR "%s:%d: corrupted ARM breakpoint at "
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"0x%08lx (0x%08x)\n", task->comm, task->pid,
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addr, old_insn.arm);
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}
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}
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void ptrace_set_bpt(struct task_struct *child)
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{
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struct pt_regs *regs;
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unsigned long pc;
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u32 insn;
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int res;
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regs = task_pt_regs(child);
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pc = instruction_pointer(regs);
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if (thumb_mode(regs)) {
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printk(KERN_WARNING "ptrace: can't handle thumb mode\n");
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return;
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}
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res = read_instr(child, pc, &insn);
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if (!res) {
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struct debug_info *dbg = &child->thread.debug;
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unsigned long alt;
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dbg->nsaved = 0;
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alt = get_branch_address(child, pc, insn);
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if (alt)
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add_breakpoint(child, dbg, alt);
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/*
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* Note that we ignore the result of setting the above
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* breakpoint since it may fail. When it does, this is
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* not so much an error, but a forewarning that we may
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* be receiving a prefetch abort shortly.
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*
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* If we don't set this breakpoint here, then we can
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* lose control of the thread during single stepping.
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*/
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if (!alt || predicate(insn) != PREDICATE_ALWAYS)
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add_breakpoint(child, dbg, pc + 4);
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}
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}
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/*
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* Ensure no single-step breakpoint is pending. Returns non-zero
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* value if child was being single-stepped.
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*/
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void ptrace_cancel_bpt(struct task_struct *child)
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{
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int i, nsaved = child->thread.debug.nsaved;
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child->thread.debug.nsaved = 0;
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if (nsaved > 2) {
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printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved);
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nsaved = 2;
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}
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for (i = 0; i < nsaved; i++)
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clear_breakpoint(child, &child->thread.debug.bp[i]);
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}
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|
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/*
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* Called by kernel/ptrace.c when detaching..
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*/
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void ptrace_disable(struct task_struct *child)
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{
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single_step_disable(child);
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}
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|
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/*
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* Handle hitting a breakpoint.
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*/
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void ptrace_break(struct task_struct *tsk, struct pt_regs *regs)
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{
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siginfo_t info;
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ptrace_cancel_bpt(tsk);
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info.si_signo = SIGTRAP;
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info.si_errno = 0;
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info.si_code = TRAP_BRKPT;
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info.si_addr = (void __user *)instruction_pointer(regs);
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force_sig_info(SIGTRAP, &info, tsk);
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}
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|
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static int break_trap(struct pt_regs *regs, unsigned int instr)
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{
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ptrace_break(current, regs);
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return 0;
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}
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|
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static struct undef_hook arm_break_hook = {
|
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.instr_mask = 0x0fffffff,
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.instr_val = 0x07f001f0,
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.cpsr_mask = PSR_T_BIT,
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.cpsr_val = 0,
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.fn = break_trap,
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};
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static struct undef_hook thumb_break_hook = {
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.instr_mask = 0xffff,
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.instr_val = 0xde01,
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.cpsr_mask = PSR_T_BIT,
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.cpsr_val = PSR_T_BIT,
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.fn = break_trap,
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};
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|
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static int __init ptrace_break_init(void)
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{
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register_undef_hook(&arm_break_hook);
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register_undef_hook(&thumb_break_hook);
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return 0;
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}
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|
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core_initcall(ptrace_break_init);
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|
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/*
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* Read the word at offset "off" into the "struct user". We
|
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* actually access the pt_regs stored on the kernel stack.
|
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*/
|
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static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
|
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unsigned long __user *ret)
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{
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unsigned long tmp;
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|
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if (off & 3 || off >= sizeof(struct user))
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return -EIO;
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|
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tmp = 0;
|
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if (off < sizeof(struct pt_regs))
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tmp = get_user_reg(tsk, off >> 2);
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|
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return put_user(tmp, ret);
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}
|
|
|
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/*
|
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* Write the word at offset "off" into "struct user". We
|
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* actually access the pt_regs stored on the kernel stack.
|
|
*/
|
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static int ptrace_write_user(struct task_struct *tsk, unsigned long off,
|
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unsigned long val)
|
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{
|
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if (off & 3 || off >= sizeof(struct user))
|
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return -EIO;
|
|
|
|
if (off >= sizeof(struct pt_regs))
|
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return 0;
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|
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return put_user_reg(tsk, off >> 2, val);
|
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}
|
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|
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/*
|
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* Get all user integer registers.
|
|
*/
|
|
static int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
|
|
{
|
|
struct pt_regs *regs = task_pt_regs(tsk);
|
|
|
|
return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
|
|
}
|
|
|
|
/*
|
|
* Set all user integer registers.
|
|
*/
|
|
static int ptrace_setregs(struct task_struct *tsk, void __user *uregs)
|
|
{
|
|
struct pt_regs newregs;
|
|
int ret;
|
|
|
|
ret = -EFAULT;
|
|
if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) {
|
|
struct pt_regs *regs = task_pt_regs(tsk);
|
|
|
|
ret = -EINVAL;
|
|
if (valid_user_regs(&newregs)) {
|
|
*regs = newregs;
|
|
ret = 0;
|
|
}
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Get the child FPU state.
|
|
*/
|
|
static int ptrace_getfpregs(struct task_struct *tsk, void __user *ufp)
|
|
{
|
|
return copy_to_user(ufp, &task_thread_info(tsk)->fpstate,
|
|
sizeof(struct user_fp)) ? -EFAULT : 0;
|
|
}
|
|
|
|
/*
|
|
* Set the child FPU state.
|
|
*/
|
|
static int ptrace_setfpregs(struct task_struct *tsk, void __user *ufp)
|
|
{
|
|
struct thread_info *thread = task_thread_info(tsk);
|
|
thread->used_cp[1] = thread->used_cp[2] = 1;
|
|
return copy_from_user(&thread->fpstate, ufp,
|
|
sizeof(struct user_fp)) ? -EFAULT : 0;
|
|
}
|
|
|
|
#ifdef CONFIG_IWMMXT
|
|
|
|
/*
|
|
* Get the child iWMMXt state.
|
|
*/
|
|
static int ptrace_getwmmxregs(struct task_struct *tsk, void __user *ufp)
|
|
{
|
|
struct thread_info *thread = task_thread_info(tsk);
|
|
|
|
if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
|
|
return -ENODATA;
|
|
iwmmxt_task_disable(thread); /* force it to ram */
|
|
return copy_to_user(ufp, &thread->fpstate.iwmmxt, IWMMXT_SIZE)
|
|
? -EFAULT : 0;
|
|
}
|
|
|
|
/*
|
|
* Set the child iWMMXt state.
|
|
*/
|
|
static int ptrace_setwmmxregs(struct task_struct *tsk, void __user *ufp)
|
|
{
|
|
struct thread_info *thread = task_thread_info(tsk);
|
|
|
|
if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
|
|
return -EACCES;
|
|
iwmmxt_task_release(thread); /* force a reload */
|
|
return copy_from_user(&thread->fpstate.iwmmxt, ufp, IWMMXT_SIZE)
|
|
? -EFAULT : 0;
|
|
}
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_CRUNCH
|
|
/*
|
|
* Get the child Crunch state.
|
|
*/
|
|
static int ptrace_getcrunchregs(struct task_struct *tsk, void __user *ufp)
|
|
{
|
|
struct thread_info *thread = task_thread_info(tsk);
|
|
|
|
crunch_task_disable(thread); /* force it to ram */
|
|
return copy_to_user(ufp, &thread->crunchstate, CRUNCH_SIZE)
|
|
? -EFAULT : 0;
|
|
}
|
|
|
|
/*
|
|
* Set the child Crunch state.
|
|
*/
|
|
static int ptrace_setcrunchregs(struct task_struct *tsk, void __user *ufp)
|
|
{
|
|
struct thread_info *thread = task_thread_info(tsk);
|
|
|
|
crunch_task_release(thread); /* force a reload */
|
|
return copy_from_user(&thread->crunchstate, ufp, CRUNCH_SIZE)
|
|
? -EFAULT : 0;
|
|
}
|
|
#endif
|
|
|
|
long arch_ptrace(struct task_struct *child, long request, long addr, long data)
|
|
{
|
|
int ret;
|
|
|
|
switch (request) {
|
|
/*
|
|
* read word at location "addr" in the child process.
|
|
*/
|
|
case PTRACE_PEEKTEXT:
|
|
case PTRACE_PEEKDATA:
|
|
ret = generic_ptrace_peekdata(child, addr, data);
|
|
break;
|
|
|
|
case PTRACE_PEEKUSR:
|
|
ret = ptrace_read_user(child, addr, (unsigned long __user *)data);
|
|
break;
|
|
|
|
/*
|
|
* write the word at location addr.
|
|
*/
|
|
case PTRACE_POKETEXT:
|
|
case PTRACE_POKEDATA:
|
|
ret = generic_ptrace_pokedata(child, addr, data);
|
|
break;
|
|
|
|
case PTRACE_POKEUSR:
|
|
ret = ptrace_write_user(child, addr, data);
|
|
break;
|
|
|
|
/*
|
|
* continue/restart and stop at next (return from) syscall
|
|
*/
|
|
case PTRACE_SYSCALL:
|
|
case PTRACE_CONT:
|
|
ret = -EIO;
|
|
if (!valid_signal(data))
|
|
break;
|
|
if (request == PTRACE_SYSCALL)
|
|
set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
|
|
else
|
|
clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
|
|
child->exit_code = data;
|
|
single_step_disable(child);
|
|
wake_up_process(child);
|
|
ret = 0;
|
|
break;
|
|
|
|
/*
|
|
* make the child exit. Best I can do is send it a sigkill.
|
|
* perhaps it should be put in the status that it wants to
|
|
* exit.
|
|
*/
|
|
case PTRACE_KILL:
|
|
single_step_disable(child);
|
|
if (child->exit_state != EXIT_ZOMBIE) {
|
|
child->exit_code = SIGKILL;
|
|
wake_up_process(child);
|
|
}
|
|
ret = 0;
|
|
break;
|
|
|
|
/*
|
|
* execute single instruction.
|
|
*/
|
|
case PTRACE_SINGLESTEP:
|
|
ret = -EIO;
|
|
if (!valid_signal(data))
|
|
break;
|
|
single_step_enable(child);
|
|
clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
|
|
child->exit_code = data;
|
|
/* give it a chance to run. */
|
|
wake_up_process(child);
|
|
ret = 0;
|
|
break;
|
|
|
|
case PTRACE_GETREGS:
|
|
ret = ptrace_getregs(child, (void __user *)data);
|
|
break;
|
|
|
|
case PTRACE_SETREGS:
|
|
ret = ptrace_setregs(child, (void __user *)data);
|
|
break;
|
|
|
|
case PTRACE_GETFPREGS:
|
|
ret = ptrace_getfpregs(child, (void __user *)data);
|
|
break;
|
|
|
|
case PTRACE_SETFPREGS:
|
|
ret = ptrace_setfpregs(child, (void __user *)data);
|
|
break;
|
|
|
|
#ifdef CONFIG_IWMMXT
|
|
case PTRACE_GETWMMXREGS:
|
|
ret = ptrace_getwmmxregs(child, (void __user *)data);
|
|
break;
|
|
|
|
case PTRACE_SETWMMXREGS:
|
|
ret = ptrace_setwmmxregs(child, (void __user *)data);
|
|
break;
|
|
#endif
|
|
|
|
case PTRACE_GET_THREAD_AREA:
|
|
ret = put_user(task_thread_info(child)->tp_value,
|
|
(unsigned long __user *) data);
|
|
break;
|
|
|
|
case PTRACE_SET_SYSCALL:
|
|
task_thread_info(child)->syscall = data;
|
|
ret = 0;
|
|
break;
|
|
|
|
#ifdef CONFIG_CRUNCH
|
|
case PTRACE_GETCRUNCHREGS:
|
|
ret = ptrace_getcrunchregs(child, (void __user *)data);
|
|
break;
|
|
|
|
case PTRACE_SETCRUNCHREGS:
|
|
ret = ptrace_setcrunchregs(child, (void __user *)data);
|
|
break;
|
|
#endif
|
|
|
|
default:
|
|
ret = ptrace_request(child, request, addr, data);
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
|
|
{
|
|
unsigned long ip;
|
|
|
|
if (!test_thread_flag(TIF_SYSCALL_TRACE))
|
|
return scno;
|
|
if (!(current->ptrace & PT_PTRACED))
|
|
return scno;
|
|
|
|
/*
|
|
* Save IP. IP is used to denote syscall entry/exit:
|
|
* IP = 0 -> entry, = 1 -> exit
|
|
*/
|
|
ip = regs->ARM_ip;
|
|
regs->ARM_ip = why;
|
|
|
|
current_thread_info()->syscall = scno;
|
|
|
|
/* the 0x80 provides a way for the tracing parent to distinguish
|
|
between a syscall stop and SIGTRAP delivery */
|
|
ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
|
|
? 0x80 : 0));
|
|
/*
|
|
* this isn't the same as continuing with a signal, but it will do
|
|
* for normal use. strace only continues with a signal if the
|
|
* stopping signal is not SIGTRAP. -brl
|
|
*/
|
|
if (current->exit_code) {
|
|
send_sig(current->exit_code, current, 1);
|
|
current->exit_code = 0;
|
|
}
|
|
regs->ARM_ip = ip;
|
|
|
|
return current_thread_info()->syscall;
|
|
}
|