David Daney b8db85b5b5 MIPS: Octeon: Update L2 Cache code for CN63XX ... The CN63XX has a different L2 cache architecture. Update the helper functions to reflect this. Some joining of split lines was also done to improve readability, as well as reformatting of comments. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1663/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2010-10-29 19:08:35 +01:00
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asm	MIPS: Octeon: Update L2 Cache code for CN63XX	2010-10-29 19:08:35 +01:00