185 lines
4.2 KiB
C
185 lines
4.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// rcpm.c - Freescale QorIQ RCPM driver
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//
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// Copyright 2019-2020 NXP
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//
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// Author: Ran Wang <ran.wang_1@nxp.com>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of_address.h>
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#include <linux/slab.h>
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#include <linux/suspend.h>
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#include <linux/kernel.h>
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#define RCPM_WAKEUP_CELL_MAX_SIZE 7
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struct rcpm {
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unsigned int wakeup_cells;
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void __iomem *ippdexpcr_base;
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bool little_endian;
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};
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#define SCFG_SPARECR8 0x051c
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static void copy_ippdexpcr1_setting(u32 val)
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{
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struct device_node *np;
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void __iomem *regs;
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u32 reg_val;
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np = of_find_compatible_node(NULL, NULL, "fsl,ls1021a-scfg");
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if (!np)
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return;
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regs = of_iomap(np, 0);
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if (!regs)
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return;
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reg_val = ioread32be(regs + SCFG_SPARECR8);
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iowrite32be(val | reg_val, regs + SCFG_SPARECR8);
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iounmap(regs);
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}
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/**
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* rcpm_pm_prepare - performs device-level tasks associated with power
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* management, such as programming related to the wakeup source control.
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* @dev: Device to handle.
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*
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*/
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static int rcpm_pm_prepare(struct device *dev)
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{
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int i, ret, idx;
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void __iomem *base;
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struct wakeup_source *ws;
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struct rcpm *rcpm;
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struct device_node *np = dev->of_node;
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u32 value[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
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u32 setting[RCPM_WAKEUP_CELL_MAX_SIZE] = {0};
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rcpm = dev_get_drvdata(dev);
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if (!rcpm)
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return -EINVAL;
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base = rcpm->ippdexpcr_base;
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idx = wakeup_sources_read_lock();
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/* Begin with first registered wakeup source */
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for_each_wakeup_source(ws) {
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/* skip object which is not attached to device */
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if (!ws->dev || !ws->dev->parent)
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continue;
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ret = device_property_read_u32_array(ws->dev->parent,
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"fsl,rcpm-wakeup", value,
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rcpm->wakeup_cells + 1);
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/* Wakeup source should refer to current rcpm device */
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if (ret || (np->phandle != value[0]))
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continue;
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/* Property "#fsl,rcpm-wakeup-cells" of rcpm node defines the
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* number of IPPDEXPCR register cells, and "fsl,rcpm-wakeup"
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* of wakeup source IP contains an integer array: <phandle to
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* RCPM node, IPPDEXPCR0 setting, IPPDEXPCR1 setting,
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* IPPDEXPCR2 setting, etc>.
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*
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* So we will go thought them to collect setting data.
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*/
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for (i = 0; i < rcpm->wakeup_cells; i++)
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setting[i] |= value[i + 1];
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}
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wakeup_sources_read_unlock(idx);
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/* Program all IPPDEXPCRn once */
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for (i = 0; i < rcpm->wakeup_cells; i++) {
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u32 tmp = setting[i];
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void __iomem *address = base + i * 4;
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if (!tmp)
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continue;
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/* We can only OR related bits */
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if (rcpm->little_endian) {
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tmp |= ioread32(address);
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iowrite32(tmp, address);
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} else {
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tmp |= ioread32be(address);
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iowrite32be(tmp, address);
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}
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/*
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* Workaround of errata A-008646 on SoC LS1021A:
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* There is a bug of register ippdexpcr1.
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* Reading configuration register RCPM_IPPDEXPCR1
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* always return zero. So save ippdexpcr1's value
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* to register SCFG_SPARECR8.And the value of
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* ippdexpcr1 will be read from SCFG_SPARECR8.
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*/
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if (dev_of_node(dev) && (i == 1))
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if (of_device_is_compatible(np, "fsl,ls1021a-rcpm"))
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copy_ippdexpcr1_setting(tmp);
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}
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return 0;
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}
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static const struct dev_pm_ops rcpm_pm_ops = {
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.prepare = rcpm_pm_prepare,
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};
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static int rcpm_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct resource *r;
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struct rcpm *rcpm;
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int ret;
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rcpm = devm_kzalloc(dev, sizeof(*rcpm), GFP_KERNEL);
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if (!rcpm)
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return -ENOMEM;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!r)
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return -ENODEV;
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rcpm->ippdexpcr_base = devm_ioremap_resource(&pdev->dev, r);
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if (IS_ERR(rcpm->ippdexpcr_base)) {
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ret = PTR_ERR(rcpm->ippdexpcr_base);
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return ret;
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}
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rcpm->little_endian = device_property_read_bool(
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&pdev->dev, "little-endian");
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ret = device_property_read_u32(&pdev->dev,
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"#fsl,rcpm-wakeup-cells", &rcpm->wakeup_cells);
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if (ret)
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return ret;
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dev_set_drvdata(&pdev->dev, rcpm);
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return 0;
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}
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static const struct of_device_id rcpm_of_match[] = {
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{ .compatible = "fsl,qoriq-rcpm-2.1+", },
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{}
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};
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MODULE_DEVICE_TABLE(of, rcpm_of_match);
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static struct platform_driver rcpm_driver = {
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.driver = {
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.name = "rcpm",
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.of_match_table = rcpm_of_match,
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.pm = &rcpm_pm_ops,
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},
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.probe = rcpm_probe,
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};
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module_platform_driver(rcpm_driver);
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