770 lines
19 KiB
C
770 lines
19 KiB
C
/*
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* Based on arch/arm/kernel/traps.c
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*
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* Copyright (C) 1995-2009 Russell King
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/bug.h>
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#include <linux/signal.h>
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#include <linux/personality.h>
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#include <linux/kallsyms.h>
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#include <linux/spinlock.h>
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#include <linux/uaccess.h>
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#include <linux/hardirq.h>
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#include <linux/kdebug.h>
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#include <linux/module.h>
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#include <linux/kexec.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/sched/signal.h>
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#include <linux/sched/debug.h>
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#include <linux/sched/task_stack.h>
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#include <linux/syscalls.h>
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#include <linux/mm_types.h>
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#include <asm/atomic.h>
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#include <asm/bug.h>
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#include <asm/debug-monitors.h>
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#include <asm/esr.h>
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#include <asm/insn.h>
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#include <asm/traps.h>
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#include <asm/stack_pointer.h>
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#include <asm/stacktrace.h>
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#include <asm/exception.h>
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#include <asm/system_misc.h>
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#include <asm/sysreg.h>
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static const char *handler[]= {
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"Synchronous Abort",
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"IRQ",
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"FIQ",
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"Error"
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};
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int show_unhandled_signals = 1;
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/*
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* Dump out the contents of some kernel memory nicely...
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*/
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static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
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unsigned long top)
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{
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unsigned long first;
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mm_segment_t fs;
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int i;
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/*
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* We need to switch to kernel mode so that we can use __get_user
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* to safely read from kernel space.
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*/
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fs = get_fs();
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set_fs(KERNEL_DS);
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printk("%s%s(0x%016lx to 0x%016lx)\n", lvl, str, bottom, top);
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for (first = bottom & ~31; first < top; first += 32) {
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unsigned long p;
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char str[sizeof(" 12345678") * 8 + 1];
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memset(str, ' ', sizeof(str));
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str[sizeof(str) - 1] = '\0';
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for (p = first, i = 0; i < (32 / 8)
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&& p < top; i++, p += 8) {
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if (p >= bottom && p < top) {
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unsigned long val;
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if (__get_user(val, (unsigned long *)p) == 0)
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sprintf(str + i * 17, " %016lx", val);
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else
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sprintf(str + i * 17, " ????????????????");
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}
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}
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printk("%s%04lx:%s\n", lvl, first & 0xffff, str);
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}
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set_fs(fs);
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}
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static void dump_backtrace_entry(unsigned long where)
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{
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/*
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* Note that 'where' can have a physical address, but it's not handled.
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*/
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print_ip_sym(where);
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}
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static void __dump_instr(const char *lvl, struct pt_regs *regs)
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{
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unsigned long addr = instruction_pointer(regs);
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char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
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int i;
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for (i = -4; i < 1; i++) {
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unsigned int val, bad;
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bad = __get_user(val, &((u32 *)addr)[i]);
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if (!bad)
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p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);
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else {
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p += sprintf(p, "bad PC value");
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break;
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}
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}
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printk("%sCode: %s\n", lvl, str);
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}
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static void dump_instr(const char *lvl, struct pt_regs *regs)
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{
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if (!user_mode(regs)) {
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mm_segment_t fs = get_fs();
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set_fs(KERNEL_DS);
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__dump_instr(lvl, regs);
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set_fs(fs);
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} else {
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__dump_instr(lvl, regs);
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}
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}
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void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
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{
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struct stackframe frame;
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unsigned long irq_stack_ptr;
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int skip;
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pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
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if (!tsk)
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tsk = current;
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if (!try_get_task_stack(tsk))
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return;
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/*
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* Switching between stacks is valid when tracing current and in
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* non-preemptible context.
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*/
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if (tsk == current && !preemptible())
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irq_stack_ptr = IRQ_STACK_PTR(smp_processor_id());
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else
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irq_stack_ptr = 0;
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if (tsk == current) {
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frame.fp = (unsigned long)__builtin_frame_address(0);
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frame.sp = current_stack_pointer;
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frame.pc = (unsigned long)dump_backtrace;
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} else {
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/*
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* task blocked in __switch_to
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*/
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frame.fp = thread_saved_fp(tsk);
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frame.sp = thread_saved_sp(tsk);
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frame.pc = thread_saved_pc(tsk);
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}
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#ifdef CONFIG_FUNCTION_GRAPH_TRACER
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frame.graph = tsk->curr_ret_stack;
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#endif
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skip = !!regs;
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printk("Call trace:\n");
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while (1) {
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unsigned long where = frame.pc;
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unsigned long stack;
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int ret;
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/* skip until specified stack frame */
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if (!skip) {
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dump_backtrace_entry(where);
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} else if (frame.fp == regs->regs[29]) {
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skip = 0;
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/*
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* Mostly, this is the case where this function is
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* called in panic/abort. As exception handler's
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* stack frame does not contain the corresponding pc
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* at which an exception has taken place, use regs->pc
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* instead.
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*/
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dump_backtrace_entry(regs->pc);
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}
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ret = unwind_frame(tsk, &frame);
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if (ret < 0)
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break;
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stack = frame.sp;
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if (in_exception_text(where)) {
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/*
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* If we switched to the irq_stack before calling this
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* exception handler, then the pt_regs will be on the
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* task stack. The easiest way to tell is if the large
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* pt_regs would overlap with the end of the irq_stack.
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*/
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if (stack < irq_stack_ptr &&
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(stack + sizeof(struct pt_regs)) > irq_stack_ptr)
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stack = IRQ_STACK_TO_TASK_STACK(irq_stack_ptr);
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dump_mem("", "Exception stack", stack,
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stack + sizeof(struct pt_regs));
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}
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}
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put_task_stack(tsk);
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}
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void show_stack(struct task_struct *tsk, unsigned long *sp)
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{
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dump_backtrace(NULL, tsk);
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barrier();
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}
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#ifdef CONFIG_PREEMPT
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#define S_PREEMPT " PREEMPT"
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#else
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#define S_PREEMPT ""
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#endif
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#define S_SMP " SMP"
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static int __die(const char *str, int err, struct pt_regs *regs)
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{
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struct task_struct *tsk = current;
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static int die_counter;
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int ret;
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pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
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str, err, ++die_counter);
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/* trap and error numbers are mostly meaningless on ARM */
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ret = notify_die(DIE_OOPS, str, regs, err, 0, SIGSEGV);
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if (ret == NOTIFY_STOP)
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return ret;
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print_modules();
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__show_regs(regs);
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pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n",
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TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk),
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end_of_stack(tsk));
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if (!user_mode(regs)) {
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dump_mem(KERN_EMERG, "Stack: ", regs->sp,
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THREAD_SIZE + (unsigned long)task_stack_page(tsk));
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dump_backtrace(regs, tsk);
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dump_instr(KERN_EMERG, regs);
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}
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return ret;
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}
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static DEFINE_RAW_SPINLOCK(die_lock);
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/*
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* This function is protected against re-entrancy.
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*/
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void die(const char *str, struct pt_regs *regs, int err)
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{
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int ret;
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unsigned long flags;
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raw_spin_lock_irqsave(&die_lock, flags);
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oops_enter();
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console_verbose();
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bust_spinlocks(1);
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ret = __die(str, err, regs);
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if (regs && kexec_should_crash(current))
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crash_kexec(regs);
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bust_spinlocks(0);
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add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
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oops_exit();
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if (in_interrupt())
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panic("Fatal exception in interrupt");
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if (panic_on_oops)
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panic("Fatal exception");
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raw_spin_unlock_irqrestore(&die_lock, flags);
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if (ret != NOTIFY_STOP)
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do_exit(SIGSEGV);
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}
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void arm64_notify_die(const char *str, struct pt_regs *regs,
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struct siginfo *info, int err)
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{
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if (user_mode(regs)) {
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current->thread.fault_address = 0;
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current->thread.fault_code = err;
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force_sig_info(info->si_signo, info, current);
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} else {
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die(str, regs, err);
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}
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}
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static LIST_HEAD(undef_hook);
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static DEFINE_RAW_SPINLOCK(undef_lock);
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void register_undef_hook(struct undef_hook *hook)
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{
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unsigned long flags;
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raw_spin_lock_irqsave(&undef_lock, flags);
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list_add(&hook->node, &undef_hook);
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raw_spin_unlock_irqrestore(&undef_lock, flags);
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}
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void unregister_undef_hook(struct undef_hook *hook)
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{
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unsigned long flags;
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raw_spin_lock_irqsave(&undef_lock, flags);
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list_del(&hook->node);
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raw_spin_unlock_irqrestore(&undef_lock, flags);
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}
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static int call_undef_hook(struct pt_regs *regs)
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{
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struct undef_hook *hook;
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unsigned long flags;
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u32 instr;
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int (*fn)(struct pt_regs *regs, u32 instr) = NULL;
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void __user *pc = (void __user *)instruction_pointer(regs);
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if (!user_mode(regs))
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return 1;
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if (compat_thumb_mode(regs)) {
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/* 16-bit Thumb instruction */
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__le16 instr_le;
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if (get_user(instr_le, (__le16 __user *)pc))
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goto exit;
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instr = le16_to_cpu(instr_le);
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if (aarch32_insn_is_wide(instr)) {
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u32 instr2;
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if (get_user(instr_le, (__le16 __user *)(pc + 2)))
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goto exit;
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instr2 = le16_to_cpu(instr_le);
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instr = (instr << 16) | instr2;
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}
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} else {
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/* 32-bit ARM instruction */
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__le32 instr_le;
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if (get_user(instr_le, (__le32 __user *)pc))
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goto exit;
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instr = le32_to_cpu(instr_le);
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}
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raw_spin_lock_irqsave(&undef_lock, flags);
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list_for_each_entry(hook, &undef_hook, node)
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if ((instr & hook->instr_mask) == hook->instr_val &&
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(regs->pstate & hook->pstate_mask) == hook->pstate_val)
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fn = hook->fn;
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raw_spin_unlock_irqrestore(&undef_lock, flags);
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exit:
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return fn ? fn(regs, instr) : 1;
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}
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static void force_signal_inject(int signal, int code, struct pt_regs *regs,
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unsigned long address)
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{
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siginfo_t info;
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void __user *pc = (void __user *)instruction_pointer(regs);
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const char *desc;
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switch (signal) {
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case SIGILL:
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desc = "undefined instruction";
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break;
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case SIGSEGV:
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desc = "illegal memory access";
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break;
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default:
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desc = "bad mode";
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break;
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}
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if (unhandled_signal(current, signal) &&
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show_unhandled_signals_ratelimited()) {
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pr_info("%s[%d]: %s: pc=%p\n",
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current->comm, task_pid_nr(current), desc, pc);
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dump_instr(KERN_INFO, regs);
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}
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info.si_signo = signal;
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info.si_errno = 0;
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info.si_code = code;
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info.si_addr = pc;
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arm64_notify_die(desc, regs, &info, 0);
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}
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/*
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* Set up process info to signal segmentation fault - called on access error.
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*/
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void arm64_notify_segfault(struct pt_regs *regs, unsigned long addr)
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{
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int code;
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down_read(¤t->mm->mmap_sem);
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if (find_vma(current->mm, addr) == NULL)
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code = SEGV_MAPERR;
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else
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code = SEGV_ACCERR;
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up_read(¤t->mm->mmap_sem);
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force_signal_inject(SIGSEGV, code, regs, addr);
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}
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asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
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{
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/* check for AArch32 breakpoint instructions */
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if (!aarch32_break_handler(regs))
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return;
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if (call_undef_hook(regs) == 0)
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return;
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force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
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}
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int cpu_enable_cache_maint_trap(void *__unused)
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{
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config_sctlr_el1(SCTLR_EL1_UCI, 0);
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return 0;
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}
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#define __user_cache_maint(insn, address, res) \
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if (address >= user_addr_max()) { \
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res = -EFAULT; \
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} else { \
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uaccess_ttbr0_enable(); \
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asm volatile ( \
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"1: " insn ", %1\n" \
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" mov %w0, #0\n" \
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"2:\n" \
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" .pushsection .fixup,\"ax\"\n" \
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" .align 2\n" \
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"3: mov %w0, %w2\n" \
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" b 2b\n" \
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" .popsection\n" \
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_ASM_EXTABLE(1b, 3b) \
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: "=r" (res) \
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: "r" (address), "i" (-EFAULT)); \
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uaccess_ttbr0_disable(); \
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}
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static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs)
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{
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unsigned long address;
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int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
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int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT;
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int ret = 0;
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address = untagged_addr(pt_regs_read_reg(regs, rt));
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switch (crm) {
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case ESR_ELx_SYS64_ISS_CRM_DC_CVAU: /* DC CVAU, gets promoted */
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__user_cache_maint("dc civac", address, ret);
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break;
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case ESR_ELx_SYS64_ISS_CRM_DC_CVAC: /* DC CVAC, gets promoted */
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__user_cache_maint("dc civac", address, ret);
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break;
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case ESR_ELx_SYS64_ISS_CRM_DC_CIVAC: /* DC CIVAC */
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__user_cache_maint("dc civac", address, ret);
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break;
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case ESR_ELx_SYS64_ISS_CRM_IC_IVAU: /* IC IVAU */
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__user_cache_maint("ic ivau", address, ret);
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break;
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default:
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force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
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return;
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}
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if (ret)
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arm64_notify_segfault(regs, address);
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else
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regs->pc += 4;
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}
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static void ctr_read_handler(unsigned int esr, struct pt_regs *regs)
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{
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int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
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unsigned long val = arm64_ftr_reg_user_value(&arm64_ftr_reg_ctrel0);
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pt_regs_write_reg(regs, rt, val);
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regs->pc += 4;
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}
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static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs)
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{
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int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
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pt_regs_write_reg(regs, rt, arch_counter_get_cntvct());
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regs->pc += 4;
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}
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static void cntfrq_read_handler(unsigned int esr, struct pt_regs *regs)
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{
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int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
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pt_regs_write_reg(regs, rt, arch_timer_get_rate());
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regs->pc += 4;
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}
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struct sys64_hook {
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unsigned int esr_mask;
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unsigned int esr_val;
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void (*handler)(unsigned int esr, struct pt_regs *regs);
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};
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static struct sys64_hook sys64_hooks[] = {
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{
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.esr_mask = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK,
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.esr_val = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL,
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.handler = user_cache_maint_handler,
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},
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{
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/* Trap read access to CTR_EL0 */
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.esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
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.esr_val = ESR_ELx_SYS64_ISS_SYS_CTR_READ,
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.handler = ctr_read_handler,
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},
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{
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/* Trap read access to CNTVCT_EL0 */
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.esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
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.esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCT,
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.handler = cntvct_read_handler,
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},
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{
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/* Trap read access to CNTFRQ_EL0 */
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.esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
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.esr_val = ESR_ELx_SYS64_ISS_SYS_CNTFRQ,
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.handler = cntfrq_read_handler,
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},
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{},
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};
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asmlinkage void __exception do_sysinstr(unsigned int esr, struct pt_regs *regs)
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{
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struct sys64_hook *hook;
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for (hook = sys64_hooks; hook->handler; hook++)
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if ((hook->esr_mask & esr) == hook->esr_val) {
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hook->handler(esr, regs);
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return;
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}
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/*
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* New SYS instructions may previously have been undefined at EL0. Fall
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* back to our usual undefined instruction handler so that we handle
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* these consistently.
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*/
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do_undefinstr(regs);
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}
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long compat_arm_syscall(struct pt_regs *regs);
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|
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asmlinkage long do_ni_syscall(struct pt_regs *regs)
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{
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#ifdef CONFIG_COMPAT
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long ret;
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if (is_compat_task()) {
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ret = compat_arm_syscall(regs);
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if (ret != -ENOSYS)
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return ret;
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|
}
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#endif
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|
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if (show_unhandled_signals_ratelimited()) {
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pr_info("%s[%d]: syscall %d\n", current->comm,
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task_pid_nr(current), (int)regs->syscallno);
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dump_instr("", regs);
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if (user_mode(regs))
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__show_regs(regs);
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|
}
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|
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return sys_ni_syscall();
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}
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static const char *esr_class_str[] = {
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[0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
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[ESR_ELx_EC_UNKNOWN] = "Unknown/Uncategorized",
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[ESR_ELx_EC_WFx] = "WFI/WFE",
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[ESR_ELx_EC_CP15_32] = "CP15 MCR/MRC",
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|
[ESR_ELx_EC_CP15_64] = "CP15 MCRR/MRRC",
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|
[ESR_ELx_EC_CP14_MR] = "CP14 MCR/MRC",
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[ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC",
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[ESR_ELx_EC_FP_ASIMD] = "ASIMD",
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[ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS",
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[ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC",
|
|
[ESR_ELx_EC_ILL] = "PSTATE.IL",
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|
[ESR_ELx_EC_SVC32] = "SVC (AArch32)",
|
|
[ESR_ELx_EC_HVC32] = "HVC (AArch32)",
|
|
[ESR_ELx_EC_SMC32] = "SMC (AArch32)",
|
|
[ESR_ELx_EC_SVC64] = "SVC (AArch64)",
|
|
[ESR_ELx_EC_HVC64] = "HVC (AArch64)",
|
|
[ESR_ELx_EC_SMC64] = "SMC (AArch64)",
|
|
[ESR_ELx_EC_SYS64] = "MSR/MRS (AArch64)",
|
|
[ESR_ELx_EC_IMP_DEF] = "EL3 IMP DEF",
|
|
[ESR_ELx_EC_IABT_LOW] = "IABT (lower EL)",
|
|
[ESR_ELx_EC_IABT_CUR] = "IABT (current EL)",
|
|
[ESR_ELx_EC_PC_ALIGN] = "PC Alignment",
|
|
[ESR_ELx_EC_DABT_LOW] = "DABT (lower EL)",
|
|
[ESR_ELx_EC_DABT_CUR] = "DABT (current EL)",
|
|
[ESR_ELx_EC_SP_ALIGN] = "SP Alignment",
|
|
[ESR_ELx_EC_FP_EXC32] = "FP (AArch32)",
|
|
[ESR_ELx_EC_FP_EXC64] = "FP (AArch64)",
|
|
[ESR_ELx_EC_SERROR] = "SError",
|
|
[ESR_ELx_EC_BREAKPT_LOW] = "Breakpoint (lower EL)",
|
|
[ESR_ELx_EC_BREAKPT_CUR] = "Breakpoint (current EL)",
|
|
[ESR_ELx_EC_SOFTSTP_LOW] = "Software Step (lower EL)",
|
|
[ESR_ELx_EC_SOFTSTP_CUR] = "Software Step (current EL)",
|
|
[ESR_ELx_EC_WATCHPT_LOW] = "Watchpoint (lower EL)",
|
|
[ESR_ELx_EC_WATCHPT_CUR] = "Watchpoint (current EL)",
|
|
[ESR_ELx_EC_BKPT32] = "BKPT (AArch32)",
|
|
[ESR_ELx_EC_VECTOR32] = "Vector catch (AArch32)",
|
|
[ESR_ELx_EC_BRK64] = "BRK (AArch64)",
|
|
};
|
|
|
|
const char *esr_get_class_string(u32 esr)
|
|
{
|
|
return esr_class_str[ESR_ELx_EC(esr)];
|
|
}
|
|
|
|
/*
|
|
* bad_mode handles the impossible case in the exception vector. This is always
|
|
* fatal.
|
|
*/
|
|
asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr)
|
|
{
|
|
console_verbose();
|
|
|
|
pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n",
|
|
handler[reason], smp_processor_id(), esr,
|
|
esr_get_class_string(esr));
|
|
|
|
die("Oops - bad mode", regs, 0);
|
|
local_irq_disable();
|
|
panic("bad mode");
|
|
}
|
|
|
|
/*
|
|
* bad_el0_sync handles unexpected, but potentially recoverable synchronous
|
|
* exceptions taken from EL0. Unlike bad_mode, this returns.
|
|
*/
|
|
asmlinkage void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr)
|
|
{
|
|
siginfo_t info;
|
|
void __user *pc = (void __user *)instruction_pointer(regs);
|
|
console_verbose();
|
|
|
|
pr_crit("Bad EL0 synchronous exception detected on CPU%d, code 0x%08x -- %s\n",
|
|
smp_processor_id(), esr, esr_get_class_string(esr));
|
|
__show_regs(regs);
|
|
|
|
info.si_signo = SIGILL;
|
|
info.si_errno = 0;
|
|
info.si_code = ILL_ILLOPC;
|
|
info.si_addr = pc;
|
|
|
|
current->thread.fault_address = 0;
|
|
current->thread.fault_code = 0;
|
|
|
|
force_sig_info(info.si_signo, &info, current);
|
|
}
|
|
|
|
void __pte_error(const char *file, int line, unsigned long val)
|
|
{
|
|
pr_err("%s:%d: bad pte %016lx.\n", file, line, val);
|
|
}
|
|
|
|
void __pmd_error(const char *file, int line, unsigned long val)
|
|
{
|
|
pr_err("%s:%d: bad pmd %016lx.\n", file, line, val);
|
|
}
|
|
|
|
void __pud_error(const char *file, int line, unsigned long val)
|
|
{
|
|
pr_err("%s:%d: bad pud %016lx.\n", file, line, val);
|
|
}
|
|
|
|
void __pgd_error(const char *file, int line, unsigned long val)
|
|
{
|
|
pr_err("%s:%d: bad pgd %016lx.\n", file, line, val);
|
|
}
|
|
|
|
/* GENERIC_BUG traps */
|
|
|
|
int is_valid_bugaddr(unsigned long addr)
|
|
{
|
|
/*
|
|
* bug_handler() only called for BRK #BUG_BRK_IMM.
|
|
* So the answer is trivial -- any spurious instances with no
|
|
* bug table entry will be rejected by report_bug() and passed
|
|
* back to the debug-monitors code and handled as a fatal
|
|
* unexpected debug exception.
|
|
*/
|
|
return 1;
|
|
}
|
|
|
|
static int bug_handler(struct pt_regs *regs, unsigned int esr)
|
|
{
|
|
if (user_mode(regs))
|
|
return DBG_HOOK_ERROR;
|
|
|
|
switch (report_bug(regs->pc, regs)) {
|
|
case BUG_TRAP_TYPE_BUG:
|
|
die("Oops - BUG", regs, 0);
|
|
break;
|
|
|
|
case BUG_TRAP_TYPE_WARN:
|
|
break;
|
|
|
|
default:
|
|
/* unknown/unrecognised bug trap type */
|
|
return DBG_HOOK_ERROR;
|
|
}
|
|
|
|
/* If thread survives, skip over the BUG instruction and continue: */
|
|
regs->pc += AARCH64_INSN_SIZE; /* skip BRK and resume */
|
|
return DBG_HOOK_HANDLED;
|
|
}
|
|
|
|
static struct break_hook bug_break_hook = {
|
|
.esr_val = 0xf2000000 | BUG_BRK_IMM,
|
|
.esr_mask = 0xffffffff,
|
|
.fn = bug_handler,
|
|
};
|
|
|
|
/*
|
|
* Initial handler for AArch64 BRK exceptions
|
|
* This handler only used until debug_traps_init().
|
|
*/
|
|
int __init early_brk64(unsigned long addr, unsigned int esr,
|
|
struct pt_regs *regs)
|
|
{
|
|
return bug_handler(regs, esr) != DBG_HOOK_HANDLED;
|
|
}
|
|
|
|
/* This registration must happen early, before debug_traps_init(). */
|
|
void __init trap_init(void)
|
|
{
|
|
register_break_hook(&bug_break_hook);
|
|
}
|