319 lines
8.6 KiB
C
319 lines
8.6 KiB
C
/*
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* Copyright 2009 VMware, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Michel Dänzer
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*/
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#include <drm/drmP.h>
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#include <drm/amdgpu_drm.h>
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#include "amdgpu.h"
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#include "amdgpu_uvd.h"
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#include "amdgpu_vce.h"
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/* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
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static void amdgpu_do_test_moves(struct amdgpu_device *adev)
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{
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struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
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struct amdgpu_bo *vram_obj = NULL;
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struct amdgpu_bo **gtt_obj = NULL;
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uint64_t gtt_addr, vram_addr;
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unsigned n, size;
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int i, r;
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size = 1024 * 1024;
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/* Number of tests =
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* (Total GTT - IB pool - writeback page - ring buffers) / test size
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*/
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n = adev->mc.gtt_size - AMDGPU_IB_POOL_SIZE*64*1024;
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for (i = 0; i < AMDGPU_MAX_RINGS; ++i)
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if (adev->rings[i])
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n -= adev->rings[i]->ring_size;
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if (adev->wb.wb_obj)
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n -= AMDGPU_GPU_PAGE_SIZE;
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if (adev->irq.ih.ring_obj)
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n -= adev->irq.ih.ring_size;
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n /= size;
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gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
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if (!gtt_obj) {
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DRM_ERROR("Failed to allocate %d pointers\n", n);
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r = 1;
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goto out_cleanup;
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}
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r = amdgpu_bo_create(adev, size, PAGE_SIZE, true,
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AMDGPU_GEM_DOMAIN_VRAM, 0,
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NULL, NULL, &vram_obj);
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if (r) {
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DRM_ERROR("Failed to create VRAM object\n");
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goto out_cleanup;
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}
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r = amdgpu_bo_reserve(vram_obj, false);
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if (unlikely(r != 0))
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goto out_unref;
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r = amdgpu_bo_pin(vram_obj, AMDGPU_GEM_DOMAIN_VRAM, &vram_addr);
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if (r) {
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DRM_ERROR("Failed to pin VRAM object\n");
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goto out_unres;
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}
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for (i = 0; i < n; i++) {
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void *gtt_map, *vram_map;
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void **gtt_start, **gtt_end;
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void **vram_start, **vram_end;
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struct fence *fence = NULL;
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r = amdgpu_bo_create(adev, size, PAGE_SIZE, true,
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AMDGPU_GEM_DOMAIN_GTT, 0, NULL,
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NULL, gtt_obj + i);
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if (r) {
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DRM_ERROR("Failed to create GTT object %d\n", i);
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goto out_lclean;
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}
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r = amdgpu_bo_reserve(gtt_obj[i], false);
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if (unlikely(r != 0))
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goto out_lclean_unref;
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r = amdgpu_bo_pin(gtt_obj[i], AMDGPU_GEM_DOMAIN_GTT, >t_addr);
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if (r) {
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DRM_ERROR("Failed to pin GTT object %d\n", i);
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goto out_lclean_unres;
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}
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r = amdgpu_bo_kmap(gtt_obj[i], >t_map);
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if (r) {
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DRM_ERROR("Failed to map GTT object %d\n", i);
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goto out_lclean_unpin;
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}
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for (gtt_start = gtt_map, gtt_end = gtt_map + size;
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gtt_start < gtt_end;
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gtt_start++)
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*gtt_start = gtt_start;
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amdgpu_bo_kunmap(gtt_obj[i]);
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r = amdgpu_copy_buffer(ring, gtt_addr, vram_addr,
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size, NULL, &fence);
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if (r) {
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DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
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goto out_lclean_unpin;
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}
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r = fence_wait(fence, false);
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if (r) {
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DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
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goto out_lclean_unpin;
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}
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fence_put(fence);
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r = amdgpu_bo_kmap(vram_obj, &vram_map);
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if (r) {
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DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
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goto out_lclean_unpin;
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}
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for (gtt_start = gtt_map, gtt_end = gtt_map + size,
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vram_start = vram_map, vram_end = vram_map + size;
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vram_start < vram_end;
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gtt_start++, vram_start++) {
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if (*vram_start != gtt_start) {
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DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
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"expected 0x%p (GTT/VRAM offset "
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"0x%16llx/0x%16llx)\n",
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i, *vram_start, gtt_start,
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(unsigned long long)
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(gtt_addr - adev->mc.gtt_start +
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(void*)gtt_start - gtt_map),
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(unsigned long long)
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(vram_addr - adev->mc.vram_start +
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(void*)gtt_start - gtt_map));
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amdgpu_bo_kunmap(vram_obj);
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goto out_lclean_unpin;
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}
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*vram_start = vram_start;
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}
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amdgpu_bo_kunmap(vram_obj);
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r = amdgpu_copy_buffer(ring, vram_addr, gtt_addr,
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size, NULL, &fence);
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if (r) {
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DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
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goto out_lclean_unpin;
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}
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r = fence_wait(fence, false);
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if (r) {
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DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
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goto out_lclean_unpin;
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}
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fence_put(fence);
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r = amdgpu_bo_kmap(gtt_obj[i], >t_map);
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if (r) {
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DRM_ERROR("Failed to map GTT object after copy %d\n", i);
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goto out_lclean_unpin;
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}
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for (gtt_start = gtt_map, gtt_end = gtt_map + size,
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vram_start = vram_map, vram_end = vram_map + size;
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gtt_start < gtt_end;
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gtt_start++, vram_start++) {
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if (*gtt_start != vram_start) {
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DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
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"expected 0x%p (VRAM/GTT offset "
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"0x%16llx/0x%16llx)\n",
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i, *gtt_start, vram_start,
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(unsigned long long)
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(vram_addr - adev->mc.vram_start +
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(void*)vram_start - vram_map),
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(unsigned long long)
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(gtt_addr - adev->mc.gtt_start +
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(void*)vram_start - vram_map));
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amdgpu_bo_kunmap(gtt_obj[i]);
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goto out_lclean_unpin;
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}
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}
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amdgpu_bo_kunmap(gtt_obj[i]);
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DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
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gtt_addr - adev->mc.gtt_start);
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continue;
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out_lclean_unpin:
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amdgpu_bo_unpin(gtt_obj[i]);
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out_lclean_unres:
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amdgpu_bo_unreserve(gtt_obj[i]);
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out_lclean_unref:
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amdgpu_bo_unref(>t_obj[i]);
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out_lclean:
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for (--i; i >= 0; --i) {
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amdgpu_bo_unpin(gtt_obj[i]);
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amdgpu_bo_unreserve(gtt_obj[i]);
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amdgpu_bo_unref(>t_obj[i]);
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}
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if (fence)
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fence_put(fence);
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break;
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}
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amdgpu_bo_unpin(vram_obj);
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out_unres:
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amdgpu_bo_unreserve(vram_obj);
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out_unref:
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amdgpu_bo_unref(&vram_obj);
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out_cleanup:
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kfree(gtt_obj);
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if (r) {
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printk(KERN_WARNING "Error while testing BO move.\n");
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}
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}
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void amdgpu_test_moves(struct amdgpu_device *adev)
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{
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if (adev->mman.buffer_funcs)
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amdgpu_do_test_moves(adev);
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}
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void amdgpu_test_ring_sync(struct amdgpu_device *adev,
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struct amdgpu_ring *ringA,
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struct amdgpu_ring *ringB)
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{
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}
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static void amdgpu_test_ring_sync2(struct amdgpu_device *adev,
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struct amdgpu_ring *ringA,
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struct amdgpu_ring *ringB,
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struct amdgpu_ring *ringC)
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{
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}
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static bool amdgpu_test_sync_possible(struct amdgpu_ring *ringA,
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struct amdgpu_ring *ringB)
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{
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if (ringA == &ringA->adev->vce.ring[0] &&
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ringB == &ringB->adev->vce.ring[1])
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return false;
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return true;
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}
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void amdgpu_test_syncing(struct amdgpu_device *adev)
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{
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int i, j, k;
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for (i = 1; i < AMDGPU_MAX_RINGS; ++i) {
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struct amdgpu_ring *ringA = adev->rings[i];
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if (!ringA || !ringA->ready)
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continue;
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for (j = 0; j < i; ++j) {
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struct amdgpu_ring *ringB = adev->rings[j];
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if (!ringB || !ringB->ready)
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continue;
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if (!amdgpu_test_sync_possible(ringA, ringB))
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continue;
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DRM_INFO("Testing syncing between rings %d and %d...\n", i, j);
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amdgpu_test_ring_sync(adev, ringA, ringB);
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DRM_INFO("Testing syncing between rings %d and %d...\n", j, i);
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amdgpu_test_ring_sync(adev, ringB, ringA);
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for (k = 0; k < j; ++k) {
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struct amdgpu_ring *ringC = adev->rings[k];
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if (!ringC || !ringC->ready)
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continue;
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if (!amdgpu_test_sync_possible(ringA, ringC))
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continue;
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if (!amdgpu_test_sync_possible(ringB, ringC))
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continue;
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DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, j, k);
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amdgpu_test_ring_sync2(adev, ringA, ringB, ringC);
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DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, k, j);
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amdgpu_test_ring_sync2(adev, ringA, ringC, ringB);
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DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, i, k);
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amdgpu_test_ring_sync2(adev, ringB, ringA, ringC);
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DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, k, i);
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amdgpu_test_ring_sync2(adev, ringB, ringC, ringA);
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DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, i, j);
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amdgpu_test_ring_sync2(adev, ringC, ringA, ringB);
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DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, j, i);
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amdgpu_test_ring_sync2(adev, ringC, ringB, ringA);
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}
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}
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}
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}
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