535 lines
16 KiB
C
535 lines
16 KiB
C
/*
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* Copyright © 2011-2012 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Ben Widawsky <ben@bwidawsk.net>
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*
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*/
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/*
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* This file implements HW context support. On gen5+ a HW context consists of an
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* opaque GPU object which is referenced at times of context saves and restores.
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* With RC6 enabled, the context is also referenced as the GPU enters and exists
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* from RC6 (GPU has it's own internal power context, except on gen5). Though
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* something like a context does exist for the media ring, the code only
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* supports contexts for the render ring.
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*
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* In software, there is a distinction between contexts created by the user,
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* and the default HW context. The default HW context is used by GPU clients
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* that do not request setup of their own hardware context. The default
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* context's state is never restored to help prevent programming errors. This
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* would happen if a client ran and piggy-backed off another clients GPU state.
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* The default context only exists to give the GPU some offset to load as the
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* current to invoke a save of the context we actually care about. In fact, the
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* code could likely be constructed, albeit in a more complicated fashion, to
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* never use the default context, though that limits the driver's ability to
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* swap out, and/or destroy other contexts.
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*
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* All other contexts are created as a request by the GPU client. These contexts
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* store GPU state, and thus allow GPU clients to not re-emit state (and
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* potentially query certain state) at any time. The kernel driver makes
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* certain that the appropriate commands are inserted.
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*
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* The context life cycle is semi-complicated in that context BOs may live
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* longer than the context itself because of the way the hardware, and object
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* tracking works. Below is a very crude representation of the state machine
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* describing the context life.
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* refcount pincount active
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* S0: initial state 0 0 0
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* S1: context created 1 0 0
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* S2: context is currently running 2 1 X
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* S3: GPU referenced, but not current 2 0 1
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* S4: context is current, but destroyed 1 1 0
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* S5: like S3, but destroyed 1 0 1
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*
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* The most common (but not all) transitions:
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* S0->S1: client creates a context
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* S1->S2: client submits execbuf with context
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* S2->S3: other clients submits execbuf with context
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* S3->S1: context object was retired
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* S3->S2: clients submits another execbuf
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* S2->S4: context destroy called with current context
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* S3->S5->S0: destroy path
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* S4->S5->S0: destroy path on current context
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*
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* There are two confusing terms used above:
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* The "current context" means the context which is currently running on the
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* GPU. The GPU has loaded it's state already and has stored away the gtt
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* offset of the BO. The GPU is not actively referencing the data at this
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* offset, but it will on the next context switch. The only way to avoid this
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* is to do a GPU reset.
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*
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* An "active context' is one which was previously the "current context" and is
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* on the active list waiting for the next context switch to occur. Until this
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* happens, the object must remain at the same gtt offset. It is therefore
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* possible to destroy a context, but it is still active.
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*
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*/
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#include <drm/drmP.h>
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#include <drm/i915_drm.h>
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#include "i915_drv.h"
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/* This is a HW constraint. The value below is the largest known requirement
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* I've seen in a spec to date, and that was a workaround for a non-shipping
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* part. It should be safe to decrease this, but it's more future proof as is.
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*/
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#define CONTEXT_ALIGN (64<<10)
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static struct i915_hw_context *
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i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
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static int do_switch(struct i915_hw_context *to);
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static int get_context_size(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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int ret;
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u32 reg;
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switch (INTEL_INFO(dev)->gen) {
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case 6:
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reg = I915_READ(CXT_SIZE);
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ret = GEN6_CXT_TOTAL_SIZE(reg) * 64;
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break;
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case 7:
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reg = I915_READ(GEN7_CXT_SIZE);
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if (IS_HASWELL(dev))
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ret = HSW_CXT_TOTAL_SIZE(reg) * 64;
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else
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ret = GEN7_CXT_TOTAL_SIZE(reg) * 64;
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break;
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default:
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BUG();
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}
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return ret;
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}
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static void do_destroy(struct i915_hw_context *ctx)
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{
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struct drm_device *dev = ctx->obj->base.dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (ctx->file_priv)
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idr_remove(&ctx->file_priv->context_idr, ctx->id);
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else
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BUG_ON(ctx != dev_priv->ring[RCS].default_context);
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drm_gem_object_unreference(&ctx->obj->base);
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kfree(ctx);
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}
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static struct i915_hw_context *
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create_hw_context(struct drm_device *dev,
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struct drm_i915_file_private *file_priv)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct i915_hw_context *ctx;
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int ret, id;
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ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
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if (ctx == NULL)
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return ERR_PTR(-ENOMEM);
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ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
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if (ctx->obj == NULL) {
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kfree(ctx);
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DRM_DEBUG_DRIVER("Context object allocated failed\n");
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return ERR_PTR(-ENOMEM);
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}
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/* The ring associated with the context object is handled by the normal
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* object tracking code. We give an initial ring value simple to pass an
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* assertion in the context switch code.
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*/
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ctx->ring = &dev_priv->ring[RCS];
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/* Default context will never have a file_priv */
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if (file_priv == NULL)
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return ctx;
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ctx->file_priv = file_priv;
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again:
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if (idr_pre_get(&file_priv->context_idr, GFP_KERNEL) == 0) {
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ret = -ENOMEM;
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DRM_DEBUG_DRIVER("idr allocation failed\n");
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goto err_out;
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}
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ret = idr_get_new_above(&file_priv->context_idr, ctx,
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DEFAULT_CONTEXT_ID + 1, &id);
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if (ret == 0)
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ctx->id = id;
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if (ret == -EAGAIN)
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goto again;
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else if (ret)
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goto err_out;
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return ctx;
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err_out:
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do_destroy(ctx);
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return ERR_PTR(ret);
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}
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static inline bool is_default_context(struct i915_hw_context *ctx)
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{
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return (ctx == ctx->ring->default_context);
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}
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/**
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* The default context needs to exist per ring that uses contexts. It stores the
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* context state of the GPU for applications that don't utilize HW contexts, as
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* well as an idle case.
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*/
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static int create_default_context(struct drm_i915_private *dev_priv)
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{
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struct i915_hw_context *ctx;
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int ret;
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BUG_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
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ctx = create_hw_context(dev_priv->dev, NULL);
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if (IS_ERR(ctx))
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return PTR_ERR(ctx);
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/* We may need to do things with the shrinker which require us to
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* immediately switch back to the default context. This can cause a
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* problem as pinning the default context also requires GTT space which
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* may not be available. To avoid this we always pin the
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* default context.
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*/
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dev_priv->ring[RCS].default_context = ctx;
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ret = i915_gem_object_pin(ctx->obj, CONTEXT_ALIGN, false, false);
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if (ret)
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goto err_destroy;
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ret = do_switch(ctx);
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if (ret)
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goto err_unpin;
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DRM_DEBUG_DRIVER("Default HW context loaded\n");
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return 0;
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err_unpin:
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i915_gem_object_unpin(ctx->obj);
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err_destroy:
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do_destroy(ctx);
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return ret;
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}
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void i915_gem_context_init(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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uint32_t ctx_size;
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if (!HAS_HW_CONTEXTS(dev)) {
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dev_priv->hw_contexts_disabled = true;
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return;
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}
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/* If called from reset, or thaw... we've been here already */
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if (dev_priv->hw_contexts_disabled ||
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dev_priv->ring[RCS].default_context)
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return;
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ctx_size = get_context_size(dev);
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dev_priv->hw_context_size = get_context_size(dev);
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dev_priv->hw_context_size = round_up(dev_priv->hw_context_size, 4096);
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if (ctx_size <= 0 || ctx_size > (1<<20)) {
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dev_priv->hw_contexts_disabled = true;
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return;
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}
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if (create_default_context(dev_priv)) {
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dev_priv->hw_contexts_disabled = true;
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return;
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}
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DRM_DEBUG_DRIVER("HW context support initialized\n");
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}
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void i915_gem_context_fini(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (dev_priv->hw_contexts_disabled)
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return;
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/* The only known way to stop the gpu from accessing the hw context is
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* to reset it. Do this as the very last operation to avoid confusing
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* other code, leading to spurious errors. */
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intel_gpu_reset(dev);
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i915_gem_object_unpin(dev_priv->ring[RCS].default_context->obj);
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do_destroy(dev_priv->ring[RCS].default_context);
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}
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static int context_idr_cleanup(int id, void *p, void *data)
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{
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struct i915_hw_context *ctx = p;
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BUG_ON(id == DEFAULT_CONTEXT_ID);
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do_destroy(ctx);
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return 0;
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}
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void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
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{
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struct drm_i915_file_private *file_priv = file->driver_priv;
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mutex_lock(&dev->struct_mutex);
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idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
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idr_destroy(&file_priv->context_idr);
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mutex_unlock(&dev->struct_mutex);
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}
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static struct i915_hw_context *
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i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
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{
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return (struct i915_hw_context *)idr_find(&file_priv->context_idr, id);
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}
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static inline int
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mi_set_context(struct intel_ring_buffer *ring,
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struct i915_hw_context *new_context,
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u32 hw_flags)
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{
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int ret;
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/* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB
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* invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value
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* explicitly, so we rely on the value at ring init, stored in
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* itlb_before_ctx_switch.
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*/
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if (IS_GEN6(ring->dev) && ring->itlb_before_ctx_switch) {
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ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0);
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if (ret)
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return ret;
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}
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ret = intel_ring_begin(ring, 6);
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if (ret)
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return ret;
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if (IS_GEN7(ring->dev))
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intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE);
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else
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intel_ring_emit(ring, MI_NOOP);
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intel_ring_emit(ring, MI_NOOP);
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intel_ring_emit(ring, MI_SET_CONTEXT);
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intel_ring_emit(ring, new_context->obj->gtt_offset |
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MI_MM_SPACE_GTT |
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MI_SAVE_EXT_STATE_EN |
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MI_RESTORE_EXT_STATE_EN |
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hw_flags);
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/* w/a: MI_SET_CONTEXT must always be followed by MI_NOOP */
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intel_ring_emit(ring, MI_NOOP);
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if (IS_GEN7(ring->dev))
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intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE);
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else
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intel_ring_emit(ring, MI_NOOP);
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intel_ring_advance(ring);
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return ret;
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}
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static int do_switch(struct i915_hw_context *to)
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{
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struct intel_ring_buffer *ring = to->ring;
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struct drm_i915_gem_object *from_obj = ring->last_context_obj;
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u32 hw_flags = 0;
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int ret;
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BUG_ON(from_obj != NULL && from_obj->pin_count == 0);
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if (from_obj == to->obj)
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return 0;
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ret = i915_gem_object_pin(to->obj, CONTEXT_ALIGN, false, false);
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if (ret)
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return ret;
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/* Clear this page out of any CPU caches for coherent swap-in/out. Note
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* that thanks to write = false in this call and us not setting any gpu
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* write domains when putting a context object onto the active list
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* (when switching away from it), this won't block.
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* XXX: We need a real interface to do this instead of trickery. */
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ret = i915_gem_object_set_to_gtt_domain(to->obj, false);
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if (ret) {
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i915_gem_object_unpin(to->obj);
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return ret;
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}
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if (!to->obj->has_global_gtt_mapping)
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i915_gem_gtt_bind_object(to->obj, to->obj->cache_level);
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if (!to->is_initialized || is_default_context(to))
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hw_flags |= MI_RESTORE_INHIBIT;
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else if (WARN_ON_ONCE(from_obj == to->obj)) /* not yet expected */
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hw_flags |= MI_FORCE_RESTORE;
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ret = mi_set_context(ring, to, hw_flags);
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if (ret) {
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i915_gem_object_unpin(to->obj);
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return ret;
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}
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/* The backing object for the context is done after switching to the
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* *next* context. Therefore we cannot retire the previous context until
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* the next context has already started running. In fact, the below code
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* is a bit suboptimal because the retiring can occur simply after the
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* MI_SET_CONTEXT instead of when the next seqno has completed.
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*/
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if (from_obj != NULL) {
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u32 seqno = i915_gem_next_request_seqno(ring);
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from_obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
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i915_gem_object_move_to_active(from_obj, ring, seqno);
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/* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
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* whole damn pipeline, we don't need to explicitly mark the
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* object dirty. The only exception is that the context must be
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* correct in case the object gets swapped out. Ideally we'd be
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* able to defer doing this until we know the object would be
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* swapped, but there is no way to do that yet.
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*/
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from_obj->dirty = 1;
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BUG_ON(from_obj->ring != ring);
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i915_gem_object_unpin(from_obj);
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drm_gem_object_unreference(&from_obj->base);
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}
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drm_gem_object_reference(&to->obj->base);
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ring->last_context_obj = to->obj;
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to->is_initialized = true;
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return 0;
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}
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/**
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* i915_switch_context() - perform a GPU context switch.
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* @ring: ring for which we'll execute the context switch
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* @file_priv: file_priv associated with the context, may be NULL
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* @id: context id number
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* @seqno: sequence number by which the new context will be switched to
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* @flags:
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*
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* The context life cycle is simple. The context refcount is incremented and
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* decremented by 1 and create and destroy. If the context is in use by the GPU,
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* it will have a refoucnt > 1. This allows us to destroy the context abstract
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* object while letting the normal object tracking destroy the backing BO.
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*/
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int i915_switch_context(struct intel_ring_buffer *ring,
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struct drm_file *file,
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int to_id)
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{
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struct drm_i915_private *dev_priv = ring->dev->dev_private;
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struct i915_hw_context *to;
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if (dev_priv->hw_contexts_disabled)
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return 0;
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if (ring != &dev_priv->ring[RCS])
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return 0;
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if (to_id == DEFAULT_CONTEXT_ID) {
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to = ring->default_context;
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} else {
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if (file == NULL)
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return -EINVAL;
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to = i915_gem_context_get(file->driver_priv, to_id);
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if (to == NULL)
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return -ENOENT;
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}
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return do_switch(to);
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}
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int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
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struct drm_file *file)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_i915_gem_context_create *args = data;
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struct drm_i915_file_private *file_priv = file->driver_priv;
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struct i915_hw_context *ctx;
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int ret;
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if (!(dev->driver->driver_features & DRIVER_GEM))
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return -ENODEV;
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if (dev_priv->hw_contexts_disabled)
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return -ENODEV;
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ret = i915_mutex_lock_interruptible(dev);
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if (ret)
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return ret;
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ctx = create_hw_context(dev, file_priv);
|
|
mutex_unlock(&dev->struct_mutex);
|
|
if (IS_ERR(ctx))
|
|
return PTR_ERR(ctx);
|
|
|
|
args->ctx_id = ctx->id;
|
|
DRM_DEBUG_DRIVER("HW context %d created\n", args->ctx_id);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_i915_gem_context_destroy *args = data;
|
|
struct drm_i915_file_private *file_priv = file->driver_priv;
|
|
struct i915_hw_context *ctx;
|
|
int ret;
|
|
|
|
if (!(dev->driver->driver_features & DRIVER_GEM))
|
|
return -ENODEV;
|
|
|
|
ret = i915_mutex_lock_interruptible(dev);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ctx = i915_gem_context_get(file_priv, args->ctx_id);
|
|
if (!ctx) {
|
|
mutex_unlock(&dev->struct_mutex);
|
|
return -ENOENT;
|
|
}
|
|
|
|
do_destroy(ctx);
|
|
|
|
mutex_unlock(&dev->struct_mutex);
|
|
|
|
DRM_DEBUG_DRIVER("HW context %d destroyed\n", args->ctx_id);
|
|
return 0;
|
|
}
|