86 lines
3.1 KiB
C
86 lines
3.1 KiB
C
/*
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* Copyright 2017 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "amdgpu.h"
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#include "amdgpu_vf_error.h"
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#include "mxgpu_ai.h"
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#define AMDGPU_VF_ERROR_ENTRY_SIZE 16
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/* struct error_entry - amdgpu VF error information. */
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struct amdgpu_vf_error_buffer {
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int read_count;
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int write_count;
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uint16_t code[AMDGPU_VF_ERROR_ENTRY_SIZE];
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uint16_t flags[AMDGPU_VF_ERROR_ENTRY_SIZE];
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uint64_t data[AMDGPU_VF_ERROR_ENTRY_SIZE];
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};
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struct amdgpu_vf_error_buffer admgpu_vf_errors;
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void amdgpu_vf_error_put(uint16_t sub_error_code, uint16_t error_flags, uint64_t error_data)
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{
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int index;
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uint16_t error_code = AMDGIM_ERROR_CODE(AMDGIM_ERROR_CATEGORY_VF, sub_error_code);
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index = admgpu_vf_errors.write_count % AMDGPU_VF_ERROR_ENTRY_SIZE;
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admgpu_vf_errors.code [index] = error_code;
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admgpu_vf_errors.flags [index] = error_flags;
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admgpu_vf_errors.data [index] = error_data;
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admgpu_vf_errors.write_count ++;
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}
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void amdgpu_vf_error_trans_all(struct amdgpu_device *adev)
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{
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/* u32 pf2vf_flags = 0; */
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u32 data1, data2, data3;
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int index;
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if ((NULL == adev) || (!amdgpu_sriov_vf(adev)) || (!adev->virt.ops) || (!adev->virt.ops->trans_msg)) {
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return;
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}
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/*
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TODO: Enable these code when pv2vf_info is merged
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AMDGPU_FW_VRAM_PF2VF_READ (adev, feature_flags, &pf2vf_flags);
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if (!(pf2vf_flags & AMDGIM_FEATURE_ERROR_LOG_COLLECT)) {
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return;
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}
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*/
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/* The errors are overlay of array, correct read_count as full. */
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if (admgpu_vf_errors.write_count - admgpu_vf_errors.read_count > AMDGPU_VF_ERROR_ENTRY_SIZE) {
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admgpu_vf_errors.read_count = admgpu_vf_errors.write_count - AMDGPU_VF_ERROR_ENTRY_SIZE;
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}
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while (admgpu_vf_errors.read_count < admgpu_vf_errors.write_count) {
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index =admgpu_vf_errors.read_count % AMDGPU_VF_ERROR_ENTRY_SIZE;
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data1 = AMDGIM_ERROR_CODE_FLAGS_TO_MAILBOX (admgpu_vf_errors.code[index], admgpu_vf_errors.flags[index]);
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data2 = admgpu_vf_errors.data[index] & 0xFFFFFFFF;
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data3 = (admgpu_vf_errors.data[index] >> 32) & 0xFFFFFFFF;
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adev->virt.ops->trans_msg(adev, IDH_LOG_VF_ERROR, data1, data2, data3);
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admgpu_vf_errors.read_count ++;
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}
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}
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