OpenCloudOS-Kernel/drivers/cxl
Yanfei Xu 70a180b8d8 cxl/pci: Fix to record only non-zero ranges
[ Upstream commit 55e268694e8b07026c88191f9b6949b6887d9ce3 ]

The function cxl_dvsec_rr_decode() retrieves and records DVSEC ranges
into info->dvsec_range[], regardless of whether it is non-zero range,
and the variable info->ranges indicates the number of non-zero ranges.
However, in cxl_hdm_decode_init(), the validation for
info->dvsec_range[] occurs in a for loop that iterates based on
info->ranges. It may result in zero range to be validated but non-zero
range not be validated, in turn, the number of allowed ranges is to be
0. Address it by only record non-zero ranges.

This fix is not urgent as it requires a configuration that zeroes out
the first dvsec range while populating the second. This has not been
observed, but it is theoretically possible. If this gets picked up for
-stable, no harm done, but there is no urgency to backport.

Fixes: 560f785590 ("cxl/pci: Retrieve CXL DVSEC memory info")
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Yanfei Xu <yanfei.xu@intel.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Link: https://patch.msgid.link/20240828084231.1378789-2-yanfei.xu@intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2024-10-04 16:29:40 +02:00
..
core cxl/pci: Fix to record only non-zero ranges 2024-10-04 16:29:40 +02:00
Kconfig cxl: fix CONFIG_FW_LOADER dependency 2023-07-14 14:32:22 -06:00
Makefile cxl/pmem: Introduce nvdimm_security_ops with ->get_flags() operation 2022-11-30 16:30:47 -08:00
acpi.c cxl/acpi: Fix load failures due to single window creation failure 2024-03-01 13:34:59 +01:00
cxl.h cxl/region: check interleave capability 2024-07-05 09:34:07 +02:00
cxlmem.h cxl/core: Fix incorrect vendor debug UUID define 2024-09-18 19:24:07 +02:00
cxlpci.h cxl/pci: Find and register CXL PMU devices 2023-05-30 11:20:35 -07:00
mem.c Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxl 2023-06-25 18:56:13 -07:00
pci.c cxl/core/regs: Rename @dev to @host in struct cxl_register_map 2023-11-20 11:59:31 +01:00
pmem.c cxl/mbox: Move mailbox related driver state to its own data structure 2023-06-25 14:31:08 -07:00
pmu.h cxl/pci: Find and register CXL PMU devices 2023-05-30 11:20:35 -07:00
port.c Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxl 2023-06-25 18:56:13 -07:00
security.c Merge branch 'for-6.5/cxl-type-2' into for-6.5/cxl 2023-06-25 17:16:51 -07:00