510 lines
12 KiB
C
510 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Broadcom specific Advanced Microcontroller Bus
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* Broadcom USB-core driver (BCMA bus glue)
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*
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* Copyright 2011-2015 Hauke Mehrtens <hauke@hauke-m.de>
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* Copyright 2015 Felix Fietkau <nbd@openwrt.org>
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*
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* Based on ssb-ohci driver
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* Copyright 2007 Michael Buesch <m@bues.ch>
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*
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* Derived from the OHCI-PCI driver
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* Copyright 1999 Roman Weissgaerber
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* Copyright 2000-2002 David Brownell
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* Copyright 1999 Linus Torvalds
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* Copyright 1999 Gregory P. Smith
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*
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* Derived from the USBcore related parts of Broadcom-SB
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* Copyright 2005-2011 Broadcom Corporation
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*/
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#include <linux/bcma/bcma.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <linux/of_gpio.h>
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#include <linux/of_platform.h>
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#include <linux/usb/ehci_pdriver.h>
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#include <linux/usb/ohci_pdriver.h>
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MODULE_AUTHOR("Hauke Mehrtens");
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MODULE_DESCRIPTION("Common USB driver for BCMA Bus");
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MODULE_LICENSE("GPL");
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/* See BCMA_CLKCTLST_EXTRESREQ and BCMA_CLKCTLST_EXTRESST */
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#define USB_BCMA_CLKCTLST_USB_CLK_REQ 0x00000100
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struct bcma_hcd_device {
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struct bcma_device *core;
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struct platform_device *ehci_dev;
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struct platform_device *ohci_dev;
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struct gpio_desc *gpio_desc;
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};
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/* Wait for bitmask in a register to get set or cleared.
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* timeout is in units of ten-microseconds.
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*/
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static int bcma_wait_bits(struct bcma_device *dev, u16 reg, u32 bitmask,
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int timeout)
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{
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int i;
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u32 val;
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for (i = 0; i < timeout; i++) {
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val = bcma_read32(dev, reg);
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if ((val & bitmask) == bitmask)
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return 0;
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udelay(10);
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}
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return -ETIMEDOUT;
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}
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static void bcma_hcd_4716wa(struct bcma_device *dev)
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{
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#ifdef CONFIG_BCMA_DRIVER_MIPS
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/* Work around for 4716 failures. */
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if (dev->bus->chipinfo.id == 0x4716) {
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u32 tmp;
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tmp = bcma_cpu_clock(&dev->bus->drv_mips);
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if (tmp >= 480000000)
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tmp = 0x1846b; /* set CDR to 0x11(fast) */
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else if (tmp == 453000000)
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tmp = 0x1046b; /* set CDR to 0x10(slow) */
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else
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tmp = 0;
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/* Change Shim mdio control reg to fix host not acking at
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* high frequencies
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*/
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if (tmp) {
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bcma_write32(dev, 0x524, 0x1); /* write sel to enable */
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udelay(500);
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bcma_write32(dev, 0x524, tmp);
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udelay(500);
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bcma_write32(dev, 0x524, 0x4ab);
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udelay(500);
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bcma_read32(dev, 0x528);
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bcma_write32(dev, 0x528, 0x80000000);
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}
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}
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#endif /* CONFIG_BCMA_DRIVER_MIPS */
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}
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/* based on arch/mips/brcm-boards/bcm947xx/pcibios.c */
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static void bcma_hcd_init_chip_mips(struct bcma_device *dev)
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{
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u32 tmp;
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/*
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* USB 2.0 special considerations:
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*
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* 1. Since the core supports both OHCI and EHCI functions, it must
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* only be reset once.
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*
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* 2. In addition to the standard SI reset sequence, the Host Control
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* Register must be programmed to bring the USB core and various
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* phy components out of reset.
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*/
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if (!bcma_core_is_enabled(dev)) {
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bcma_core_enable(dev, 0);
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mdelay(10);
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if (dev->id.rev >= 5) {
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/* Enable Misc PLL */
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tmp = bcma_read32(dev, 0x1e0);
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tmp |= 0x100;
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bcma_write32(dev, 0x1e0, tmp);
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if (bcma_wait_bits(dev, 0x1e0, 1 << 24, 100))
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printk(KERN_EMERG "Failed to enable misc PPL!\n");
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/* Take out of resets */
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bcma_write32(dev, 0x200, 0x4ff);
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udelay(25);
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bcma_write32(dev, 0x200, 0x6ff);
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udelay(25);
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/* Make sure digital and AFE are locked in USB PHY */
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bcma_write32(dev, 0x524, 0x6b);
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udelay(50);
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tmp = bcma_read32(dev, 0x524);
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udelay(50);
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bcma_write32(dev, 0x524, 0xab);
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udelay(50);
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tmp = bcma_read32(dev, 0x524);
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udelay(50);
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bcma_write32(dev, 0x524, 0x2b);
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udelay(50);
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tmp = bcma_read32(dev, 0x524);
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udelay(50);
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bcma_write32(dev, 0x524, 0x10ab);
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udelay(50);
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tmp = bcma_read32(dev, 0x524);
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if (bcma_wait_bits(dev, 0x528, 0xc000, 10000)) {
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tmp = bcma_read32(dev, 0x528);
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printk(KERN_EMERG
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"USB20H mdio_rddata 0x%08x\n", tmp);
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}
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bcma_write32(dev, 0x528, 0x80000000);
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tmp = bcma_read32(dev, 0x314);
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udelay(265);
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bcma_write32(dev, 0x200, 0x7ff);
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udelay(10);
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/* Take USB and HSIC out of non-driving modes */
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bcma_write32(dev, 0x510, 0);
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} else {
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bcma_write32(dev, 0x200, 0x7ff);
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udelay(1);
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}
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bcma_hcd_4716wa(dev);
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}
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}
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/**
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* bcma_hcd_usb20_old_arm_init - Initialize old USB 2.0 controller on ARM
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*
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* Old USB 2.0 core is identified as BCMA_CORE_USB20_HOST and was introduced
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* long before Northstar devices. It seems some cheaper chipsets like BCM53573
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* still use it.
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* Initialization of this old core differs between MIPS and ARM.
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*/
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static int bcma_hcd_usb20_old_arm_init(struct bcma_hcd_device *usb_dev)
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{
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struct bcma_device *core = usb_dev->core;
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struct device *dev = &core->dev;
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struct bcma_device *pmu_core;
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usleep_range(10000, 20000);
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if (core->id.rev < 5)
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return 0;
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pmu_core = bcma_find_core(core->bus, BCMA_CORE_PMU);
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if (!pmu_core) {
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dev_err(dev, "Could not find PMU core\n");
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return -ENOENT;
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}
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/* Take USB core out of reset */
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bcma_awrite32(core, BCMA_IOCTL, BCMA_IOCTL_CLK | BCMA_IOCTL_FGC);
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usleep_range(100, 200);
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bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);
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usleep_range(100, 200);
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bcma_awrite32(core, BCMA_RESET_CTL, 0);
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usleep_range(100, 200);
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bcma_awrite32(core, BCMA_IOCTL, BCMA_IOCTL_CLK);
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usleep_range(100, 200);
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/* Enable Misc PLL */
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bcma_write32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT |
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BCMA_CLKCTLST_HQCLKREQ |
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USB_BCMA_CLKCTLST_USB_CLK_REQ);
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usleep_range(100, 200);
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bcma_write32(core, 0x510, 0xc7f85000);
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bcma_write32(core, 0x510, 0xc7f85003);
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usleep_range(300, 600);
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/* Program USB PHY PLL parameters */
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bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_ADDR, 0x6);
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bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_DATA, 0x005360c1);
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usleep_range(100, 200);
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bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_ADDR, 0x7);
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bcma_write32(pmu_core, BCMA_CC_PMU_PLLCTL_DATA, 0x0);
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usleep_range(100, 200);
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bcma_set32(pmu_core, BCMA_CC_PMU_CTL, BCMA_CC_PMU_CTL_PLL_UPD);
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usleep_range(100, 200);
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bcma_write32(core, 0x510, 0x7f8d007);
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udelay(1000);
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/* Take controller out of reset */
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bcma_write32(core, 0x200, 0x4ff);
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usleep_range(25, 50);
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bcma_write32(core, 0x200, 0x6ff);
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usleep_range(25, 50);
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bcma_write32(core, 0x200, 0x7ff);
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usleep_range(25, 50);
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of_platform_default_populate(dev->of_node, NULL, dev);
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return 0;
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}
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static void bcma_hcd_usb20_ns_init_hc(struct bcma_device *dev)
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{
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u32 val;
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/* Set packet buffer OUT threshold */
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val = bcma_read32(dev, 0x94);
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val &= 0xffff;
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val |= 0x80 << 16;
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bcma_write32(dev, 0x94, val);
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/* Enable break memory transfer */
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val = bcma_read32(dev, 0x9c);
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val |= 1;
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bcma_write32(dev, 0x9c, val);
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/*
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* Broadcom initializes PHY and then waits to ensure HC is ready to be
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* configured. In our case the order is reversed. We just initialized
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* controller and we let HCD initialize PHY, so let's wait (sleep) now.
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*/
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usleep_range(1000, 2000);
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}
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/**
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* bcma_hcd_usb20_ns_init - Initialize Northstar USB 2.0 controller
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*/
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static int bcma_hcd_usb20_ns_init(struct bcma_hcd_device *bcma_hcd)
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{
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struct bcma_device *core = bcma_hcd->core;
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struct bcma_chipinfo *ci = &core->bus->chipinfo;
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struct device *dev = &core->dev;
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bcma_core_enable(core, 0);
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if (ci->id == BCMA_CHIP_ID_BCM4707 ||
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ci->id == BCMA_CHIP_ID_BCM53018)
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bcma_hcd_usb20_ns_init_hc(core);
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of_platform_default_populate(dev->of_node, NULL, dev);
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return 0;
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}
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static void bcma_hci_platform_power_gpio(struct bcma_device *dev, bool val)
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{
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struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
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if (IS_ERR_OR_NULL(usb_dev->gpio_desc))
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return;
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gpiod_set_value(usb_dev->gpio_desc, val);
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}
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static const struct usb_ehci_pdata ehci_pdata = {
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};
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static const struct usb_ohci_pdata ohci_pdata = {
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};
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static struct platform_device *bcma_hcd_create_pdev(struct bcma_device *dev,
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const char *name, u32 addr,
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const void *data,
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size_t size)
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{
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struct platform_device *hci_dev;
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struct resource hci_res[2];
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int ret;
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memset(hci_res, 0, sizeof(hci_res));
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hci_res[0].start = addr;
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hci_res[0].end = hci_res[0].start + 0x1000 - 1;
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hci_res[0].flags = IORESOURCE_MEM;
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hci_res[1].start = dev->irq;
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hci_res[1].flags = IORESOURCE_IRQ;
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hci_dev = platform_device_alloc(name, 0);
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if (!hci_dev)
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return ERR_PTR(-ENOMEM);
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hci_dev->dev.parent = &dev->dev;
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hci_dev->dev.dma_mask = &hci_dev->dev.coherent_dma_mask;
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ret = platform_device_add_resources(hci_dev, hci_res,
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ARRAY_SIZE(hci_res));
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if (ret)
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goto err_alloc;
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if (data)
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ret = platform_device_add_data(hci_dev, data, size);
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if (ret)
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goto err_alloc;
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ret = platform_device_add(hci_dev);
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if (ret)
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goto err_alloc;
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return hci_dev;
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err_alloc:
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platform_device_put(hci_dev);
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return ERR_PTR(ret);
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}
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static int bcma_hcd_usb20_init(struct bcma_hcd_device *usb_dev)
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{
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struct bcma_device *dev = usb_dev->core;
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struct bcma_chipinfo *chipinfo = &dev->bus->chipinfo;
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u32 ohci_addr;
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int err;
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if (dma_set_mask_and_coherent(dev->dma_dev, DMA_BIT_MASK(32)))
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return -EOPNOTSUPP;
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bcma_hcd_init_chip_mips(dev);
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/* In AI chips EHCI is addrspace 0, OHCI is 1 */
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ohci_addr = dev->addr_s[0];
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if ((chipinfo->id == BCMA_CHIP_ID_BCM5357 ||
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chipinfo->id == BCMA_CHIP_ID_BCM4749)
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&& chipinfo->rev == 0)
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ohci_addr = 0x18009000;
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usb_dev->ohci_dev = bcma_hcd_create_pdev(dev, "ohci-platform",
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ohci_addr, &ohci_pdata,
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sizeof(ohci_pdata));
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if (IS_ERR(usb_dev->ohci_dev))
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return PTR_ERR(usb_dev->ohci_dev);
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usb_dev->ehci_dev = bcma_hcd_create_pdev(dev, "ehci-platform",
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dev->addr, &ehci_pdata,
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sizeof(ehci_pdata));
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if (IS_ERR(usb_dev->ehci_dev)) {
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err = PTR_ERR(usb_dev->ehci_dev);
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goto err_unregister_ohci_dev;
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}
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return 0;
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err_unregister_ohci_dev:
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platform_device_unregister(usb_dev->ohci_dev);
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return err;
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}
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static int bcma_hcd_usb30_init(struct bcma_hcd_device *bcma_hcd)
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{
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struct bcma_device *core = bcma_hcd->core;
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struct device *dev = &core->dev;
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bcma_core_enable(core, 0);
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of_platform_default_populate(dev->of_node, NULL, dev);
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return 0;
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}
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static int bcma_hcd_probe(struct bcma_device *core)
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{
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int err;
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struct bcma_hcd_device *usb_dev;
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/* TODO: Probably need checks here; is the core connected? */
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usb_dev = devm_kzalloc(&core->dev, sizeof(struct bcma_hcd_device),
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GFP_KERNEL);
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if (!usb_dev)
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return -ENOMEM;
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usb_dev->core = core;
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if (core->dev.of_node)
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usb_dev->gpio_desc = devm_gpiod_get(&core->dev, "vcc",
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GPIOD_OUT_HIGH);
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switch (core->id.id) {
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case BCMA_CORE_USB20_HOST:
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if (IS_ENABLED(CONFIG_ARM))
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err = bcma_hcd_usb20_old_arm_init(usb_dev);
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else if (IS_ENABLED(CONFIG_MIPS))
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err = bcma_hcd_usb20_init(usb_dev);
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else
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err = -ENOTSUPP;
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break;
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case BCMA_CORE_NS_USB20:
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err = bcma_hcd_usb20_ns_init(usb_dev);
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break;
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case BCMA_CORE_NS_USB30:
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err = bcma_hcd_usb30_init(usb_dev);
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break;
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default:
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return -ENODEV;
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}
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if (err)
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return err;
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bcma_set_drvdata(core, usb_dev);
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return 0;
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}
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static void bcma_hcd_remove(struct bcma_device *dev)
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{
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struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
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struct platform_device *ohci_dev = usb_dev->ohci_dev;
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struct platform_device *ehci_dev = usb_dev->ehci_dev;
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if (ohci_dev)
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platform_device_unregister(ohci_dev);
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if (ehci_dev)
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platform_device_unregister(ehci_dev);
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bcma_core_disable(dev, 0);
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}
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static void bcma_hcd_shutdown(struct bcma_device *dev)
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{
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bcma_hci_platform_power_gpio(dev, false);
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bcma_core_disable(dev, 0);
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}
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#ifdef CONFIG_PM
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static int bcma_hcd_suspend(struct bcma_device *dev)
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{
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bcma_hci_platform_power_gpio(dev, false);
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bcma_core_disable(dev, 0);
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return 0;
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}
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static int bcma_hcd_resume(struct bcma_device *dev)
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{
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bcma_hci_platform_power_gpio(dev, true);
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bcma_core_enable(dev, 0);
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return 0;
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}
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#else /* !CONFIG_PM */
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#define bcma_hcd_suspend NULL
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#define bcma_hcd_resume NULL
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#endif /* CONFIG_PM */
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static const struct bcma_device_id bcma_hcd_table[] = {
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BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_USB20_HOST, BCMA_ANY_REV, BCMA_ANY_CLASS),
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BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB20, BCMA_ANY_REV, BCMA_ANY_CLASS),
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BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_NS_USB30, BCMA_ANY_REV, BCMA_ANY_CLASS),
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{},
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};
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MODULE_DEVICE_TABLE(bcma, bcma_hcd_table);
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static struct bcma_driver bcma_hcd_driver = {
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.name = KBUILD_MODNAME,
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.id_table = bcma_hcd_table,
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.probe = bcma_hcd_probe,
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.remove = bcma_hcd_remove,
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.shutdown = bcma_hcd_shutdown,
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.suspend = bcma_hcd_suspend,
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.resume = bcma_hcd_resume,
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};
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|
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static int __init bcma_hcd_init(void)
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|
{
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return bcma_driver_register(&bcma_hcd_driver);
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}
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module_init(bcma_hcd_init);
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|
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static void __exit bcma_hcd_exit(void)
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|
{
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bcma_driver_unregister(&bcma_hcd_driver);
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}
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module_exit(bcma_hcd_exit);
|