OpenCloudOS-Kernel/drivers/pinctrl/sh-pfc
Linus Torvalds 88a99886c2 This is the bulk of pin control changes for the v4.3 development
cycle
 
 Core changes:
 
 - It is possible configure groups in debugfs.
 
 - Consolidation of chained IRQ handler install/remove replacing
   all call sites where irq_set_handler_data() and
   irq_set_chained_handler() were done in succession with a
   combined call to irq_set_chained_handler_and_data(). This
   series was created by Thomas Gleixner after the problem was
   observed by Russell King.
 
 - Tglx also made another series of patches switching
   __irq_set_handler_locked() for irq_set_handler_locked() which
   is way cleaner.
 
 - Tglx also wrote a good bunch of patches to make use of
   irq_desc_get_xxx() accessors and avoid looking up irq_descs
   from IRQ numbers. The goal is to get rid of the irq number
   from the handlers in the IRQ flow which is nice.
 
 Driver feature enhancements:
 
 - Power management support for the SiRF SoC Atlas 7.
 
 - Power down support for the Qualcomm driver.
 
 - Intel Cherryview and Baytrail: switch drivers to use raw
   spinlocks in IRQ handlers to play nice with the realtime
   patch set.
 
 - Rework and new modes handling for Qualcomm SPMI-MPP.
 
 - Pinconf power source config for SH PFC.
 
 New drivers and subdrivers:
 
 - A new driver for Conexant Digicolor CX92755.
 
 - A new driver for UniPhier PH1-LD4, PH1-Pro4, PH1-sLD8,
   PH1-Pro5, ProXtream2 and PH1-LD6b SoC pin control support.
 
 - Reverse-egineered the S/PDIF settings for the Allwinner
   sun4i driver.
 
 - Support for Qualcomm Technologies QDF2xxx ARM64 SoCs
 
 - A new Freescale i.mx6ul subdriver.
 
 Cleanup:
 
 - Remove platform data support in a number of SH PFC
   subdrivers.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJV6YzgAAoJEEEQszewGV1zbIAQAILzMrzWkxsy7bhvL4QdP5/K
 OG3EodE//AE0G5gKugUDjg5t2lftdiIJVhjDA17ruETCSciuAxZSLThlMy1sQgyN
 LPxy9LlCrmsqrYt9+fmJ9js8j52RBJikKK0RUyUVz0VojTBplRpElyEx/KxwM5sG
 Hy3+hU61uKO0j9AyIcsa/RKP6SGavwZdHytJBsHNw+pODyE3UZCf52ChAVBsTPfE
 MV70g3Qzfqur7ZFqcNgtUV7qCyYvlF12ooiihrGFDOsTL3sSq4/OXB7z1z1mGGHL
 Dgq8pXJ6EIZlCbk+jFMTzPRSzy46dxNai0eErjTUVEldH1tOphzGMvKmOdm/nczH
 4M/UOWOKBE1aOYZNPtnUgDy2MRt5K9VJStCNSHEQCB2lGdojNAtmj2cmr8flBN5m
 gM9FDpIS1/C+OYYTkOY9ftPsH5zOk7sCLEHSH5USYRGJHihzLnkV90eiN6a7vlF1
 hyTGrIyl6e//E5JBgamjnR3+fYuxQGr6WeAZEP/gXZRm7BCKCaPwCarq+kPZVG4A
 nolZ/QQN6XYPSlveSPU97VYvLYEUvXaKN0Hf2DTbwkqvNFp7JORD65QLESPtQoIp
 x95iHMdB/1+0OfgOqMmlOtKpOKREeQ/R+KWACxsrr5Rfv3/7CP4BMRGypIZ/iPmz
 HWoyDI4lIebBR+JnjMjK
 =4QFX
 -----END PGP SIGNATURE-----

Merge tag 'pinctrl-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of pin control changes for the v4.3 development
  cycle.

  Like with GPIO it's a lot of stuff.  If my subsystems are any sign of
  the overall tempo of the kernel v4.3 will be a gigantic diff.

[ It looks like 4.3 is calmer than 4.2 in most other subsystems, but
  we'll see - Linus ]

  Core changes:

   - It is possible configure groups in debugfs.

   - Consolidation of chained IRQ handler install/remove replacing all
     call sites where irq_set_handler_data() and
     irq_set_chained_handler() were done in succession with a combined
     call to irq_set_chained_handler_and_data().  This series was
     created by Thomas Gleixner after the problem was observed by
     Russell King.

   - Tglx also made another series of patches switching
     __irq_set_handler_locked() for irq_set_handler_locked() which is
     way cleaner.

   - Tglx also wrote a good bunch of patches to make use of
     irq_desc_get_xxx() accessors and avoid looking up irq_descs from
     IRQ numbers.  The goal is to get rid of the irq number from the
     handlers in the IRQ flow which is nice.

  Driver feature enhancements:

   - Power management support for the SiRF SoC Atlas 7.

   - Power down support for the Qualcomm driver.

   - Intel Cherryview and Baytrail: switch drivers to use raw spinlocks
     in IRQ handlers to play nice with the realtime patch set.

   - Rework and new modes handling for Qualcomm SPMI-MPP.

   - Pinconf power source config for SH PFC.

  New drivers and subdrivers:

   - A new driver for Conexant Digicolor CX92755.

   - A new driver for UniPhier PH1-LD4, PH1-Pro4, PH1-sLD8, PH1-Pro5,
     ProXtream2 and PH1-LD6b SoC pin control support.

   - Reverse-egineered the S/PDIF settings for the Allwinner sun4i
     driver.

   - Support for Qualcomm Technologies QDF2xxx ARM64 SoCs

   - A new Freescale i.mx6ul subdriver.

  Cleanup:

   - Remove platform data support in a number of SH PFC subdrivers"

* tag 'pinctrl-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (95 commits)
  pinctrl: at91: fix null pointer dereference
  pinctrl: mediatek: Implement wake handler and suspend resume
  pinctrl: mediatek: Fix multiple registration issue.
  pinctrl: sh-pfc: r8a7794: add USB pin groups
  pinctrl: at91: Use generic irq_{request,release}_resources()
  pinctrl: cherryview: Use raw_spinlock for locking
  pinctrl: baytrail: Use raw_spinlock for locking
  pinctrl: imx6ul: Remove .owner field
  pinctrl: zynq: Fix typos in smc0_nand_grp and smc0_nor_grp
  pinctrl: sh-pfc: Implement pinconf power-source param for voltage switching
  clk: rockchip: add pclk_pd_pmu to the list of rk3288 critical clocks
  pinctrl: sun4i: add spdif to pin description.
  pinctrl: atlas7: clear ugly branch statements for pull and drivestrength
  pinctrl: baytrail: Serialize all register access
  pinctrl: baytrail: Drop FSF mailing address
  pinctrl: rockchip: only enable gpio clock when it setting
  pinctrl/mediatek: fix spelling mistake in dev_err error message
  pinctrl: cherryview: Serialize all register access
  pinctrl: UniPhier: PH1-Pro5: add I2C ch6 pin-mux setting
  pinctrl: nomadik: reflect current input value
  ...
2015-09-04 10:22:09 -07:00
..
Kconfig pinctrl: sh-pfc: add R8A7794 PFC support 2015-06-16 10:53:20 +02:00
Makefile pinctrl: sh-pfc: add R8A7794 PFC support 2015-06-16 10:53:20 +02:00
core.c pinctrl: sh-pfc: Remove obsolete r8a7740 platform_device_id entry 2015-07-16 11:40:10 +02:00
core.h pinctrl: sh-pfc: add R8A7794 PFC support 2015-06-16 10:53:20 +02:00
gpio.c pinctrl: sh-pfc: Use u32 to store register addresses 2015-03-18 02:15:40 +01:00
pfc-emev2.c sh-pfc: emev2 - Fix mangled author name 2015-02-05 14:51:34 +01:00
pfc-r8a73a4.c pinctrl: sh-pfc: r8a73a4: Remove obsolete multi-platform check 2015-05-12 13:17:44 +02:00
pfc-r8a7740.c pinctrl: sh-pfc: r8a7740: Remove obsolete multi-platform check 2015-07-16 11:39:17 +02:00
pfc-r8a7778.c pinctrl: sh-pfc: ARM: Constify pins and cfg_regs arrays 2013-12-20 12:28:40 +01:00
pfc-r8a7779.c pinctrl: sh-pfc: ARM: Constify pins and cfg_regs arrays 2013-12-20 12:28:40 +01:00
pfc-r8a7790.c sh-pfc: r8a7790: remove non-existing GPIO pins 2015-07-16 09:39:01 +02:00
pfc-r8a7791.c sh-pfc: r8a7791: remove non-existing GPIO pins 2015-07-16 09:39:02 +02:00
pfc-r8a7794.c pinctrl: sh-pfc: r8a7794: add USB pin groups 2015-08-26 13:40:25 +02:00
pfc-sh73a0.c pinctrl: sh-pfc: sh73a0: Remove obsolete multi-platform check 2015-07-16 11:37:38 +02:00
pfc-sh7203.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7264.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7269.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7720.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7722.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7723.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7724.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7734.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7757.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7785.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7786.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-shx3.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pinctrl.c pinctrl: sh-pfc: Implement pinconf power-source param for voltage switching 2015-08-24 10:44:54 +02:00
sh_pfc.h This is the bulk of pin control changes for the v4.3 development 2015-09-04 10:22:09 -07:00