Pu Wen 39dc6f154d x86/cpu/mtrr: Support TOP_MEM2 and get MTRR number ... The Hygon Dhyana CPU has a special MSR way to force WB for memory >4GB, and support TOP_MEM2. Therefore, it is necessary to add Hygon Dhyana support in amd_special_default_mtrr(). The number of variable MTRRs for Hygon is 2 as AMD's. Signed-off-by: Pu Wen <puwen@hygon.cn> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Borislav Petkov <bp@suse.de> Cc: tglx@linutronix.de Cc: mingo@redhat.com Cc: hpa@zytor.com Cc: x86@kernel.org Cc: thomas.lendacky@amd.com Link: https://lkml.kernel.org/r/8246f81648d014601de3812ade40e85d9c50d9b3.1537533369.git.puwen@hygon.cn		2018-09-27 18:28:57 +02:00
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Makefile	x86/mtrr: Rename main.c to mtrr.c and remove duplicate prefixes	2018-05-13 21:25:18 +02:00
amd.c	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
centaur.c	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
cleanup.c	x86/cpu/mtrr: Support TOP_MEM2 and get MTRR number	2018-09-27 18:28:57 +02:00
cyrix.c	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
generic.c	x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_stepping	2018-02-15 01:15:52 +01:00
if.c	x86/mtrr: Don't copy out-of-bounds data in mtrr_write	2018-07-07 18:58:41 +02:00
mtrr.c	x86/cpu/mtrr: Support TOP_MEM2 and get MTRR number	2018-09-27 18:28:57 +02:00
mtrr.h	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00