Christophe Leroy 697ece78f8 powerpc/32s: reorder Linux PTE bits to better match Hash PTE bits. ... Reorder Linux PTE bits to (almost) match Hash PTE bits. RW Kernel : PP = 00 RO Kernel : PP = 00 RW User : PP = 01 RO User : PP = 11 So naturally, we should have _PAGE_USER = 0x001 _PAGE_RW = 0x002 Today 0x001 and 0x002 and _PAGE_PRESENT and _PAGE_HASHPTE which both are software only bits. Switch _PAGE_USER and _PAGE_PRESET Switch _PAGE_RW and _PAGE_HASHPTE This allows to remove a few insns. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/c4d6c18a7f8d9d3b899bc492f55fbc40ef38896a.1583861325.git.christophe.leroy@c-s.fr		2020-03-25 12:09:27 +11:00
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hash.h	powerpc/32s: reorder Linux PTE bits to better match Hash PTE bits.	2020-03-25 12:09:27 +11:00
kup.h	powerpc: Implement user_access_save() and user_access_restore()	2020-01-28 23:14:44 +11:00
mmu-hash.h	powerpc/mm: move pgtable_t in asm/mmu.h	2019-05-03 01:20:24 +10:00
pgalloc.h	powerpc/mmu_gather: enable RCU_TABLE_FREE even for !SMP case	2020-02-04 03:05:25 +00:00
pgtable.h	powerpc/mm: Don't kmap_atomic() in pte_offset_map() on PPC32	2020-03-04 22:44:27 +11:00
tlbflush.h	powerpc: split asm/tlbflush.h	2018-07-30 22:48:21 +10:00