136 lines
4.1 KiB
C
136 lines
4.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*/
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#ifndef _DPU_PLANE_H_
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#define _DPU_PLANE_H_
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#include <drm/drm_crtc.h>
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#include "dpu_kms.h"
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#include "dpu_hw_mdss.h"
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#include "dpu_hw_sspp.h"
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/**
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* struct dpu_plane_state: Define dpu extension of drm plane state object
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* @base: base drm plane state object
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* @aspace: pointer to address space for input/output buffers
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* @stage: assigned by crtc blender
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* @needs_qos_remap: qos remap settings need to be updated
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* @multirect_index: index of the rectangle of SSPP
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* @multirect_mode: parallel or time multiplex multirect mode
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* @pending: whether the current update is still pending
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* @plane_fetch_bw: calculated BW per plane
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* @plane_clk: calculated clk per plane
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*/
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struct dpu_plane_state {
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struct drm_plane_state base;
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struct msm_gem_address_space *aspace;
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enum dpu_stage stage;
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bool needs_qos_remap;
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uint32_t multirect_index;
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uint32_t multirect_mode;
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bool pending;
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u64 plane_fetch_bw;
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u64 plane_clk;
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};
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/**
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* struct dpu_multirect_plane_states: Defines multirect pair of drm plane states
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* @r0: drm plane configured on rect 0
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* @r1: drm plane configured on rect 1
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*/
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struct dpu_multirect_plane_states {
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const struct drm_plane_state *r0;
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const struct drm_plane_state *r1;
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};
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#define to_dpu_plane_state(x) \
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container_of(x, struct dpu_plane_state, base)
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/**
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* dpu_plane_pipe - return sspp identifier for the given plane
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* @plane: Pointer to DRM plane object
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* Returns: sspp identifier of the given plane
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*/
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enum dpu_sspp dpu_plane_pipe(struct drm_plane *plane);
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/**
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* is_dpu_plane_virtual - check for virtual plane
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* @plane: Pointer to DRM plane object
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* returns: true - if the plane is virtual
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* false - if the plane is primary
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*/
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bool is_dpu_plane_virtual(struct drm_plane *plane);
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/**
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* dpu_plane_get_ctl_flush - get control flush mask
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* @plane: Pointer to DRM plane object
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* @ctl: Pointer to control hardware
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* @flush_sspp: Pointer to sspp flush control word
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*/
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void dpu_plane_get_ctl_flush(struct drm_plane *plane, struct dpu_hw_ctl *ctl,
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u32 *flush_sspp);
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/**
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* dpu_plane_flush - final plane operations before commit flush
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* @plane: Pointer to drm plane structure
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*/
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void dpu_plane_flush(struct drm_plane *plane);
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/**
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* dpu_plane_set_error: enable/disable error condition
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* @plane: pointer to drm_plane structure
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*/
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void dpu_plane_set_error(struct drm_plane *plane, bool error);
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/**
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* dpu_plane_init - create new dpu plane for the given pipe
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* @dev: Pointer to DRM device
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* @pipe: dpu hardware pipe identifier
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* @type: Plane type - PRIMARY/OVERLAY/CURSOR
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* @possible_crtcs: bitmask of crtc that can be attached to the given pipe
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* @master_plane_id: primary plane id of a multirect pipe. 0 value passed for
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* a regular plane initialization. A non-zero primary plane
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* id will be passed for a virtual pipe initialization.
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*
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*/
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struct drm_plane *dpu_plane_init(struct drm_device *dev,
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uint32_t pipe, enum drm_plane_type type,
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unsigned long possible_crtcs, u32 master_plane_id);
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/**
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* dpu_plane_validate_multirecti_v2 - validate the multirect planes
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* against hw limitations
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* @plane: drm plate states of the multirect pair
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*/
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int dpu_plane_validate_multirect_v2(struct dpu_multirect_plane_states *plane);
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/**
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* dpu_plane_clear_multirect - clear multirect bits for the given pipe
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* @drm_state: Pointer to DRM plane state
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*/
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void dpu_plane_clear_multirect(const struct drm_plane_state *drm_state);
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/**
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* dpu_plane_color_fill - enables color fill on plane
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* @plane: Pointer to DRM plane object
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* @color: RGB fill color value, [23..16] Blue, [15..8] Green, [7..0] Red
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* @alpha: 8-bit fill alpha value, 255 selects 100% alpha
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* Returns: 0 on success
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*/
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int dpu_plane_color_fill(struct drm_plane *plane,
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uint32_t color, uint32_t alpha);
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#ifdef CONFIG_DEBUG_FS
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void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable);
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#else
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static inline void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable) {}
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#endif
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#endif /* _DPU_PLANE_H_ */
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